File: /usr/src/linux/drivers/video/chipsfb.c
1 /*
2 * drivers/video/chipsfb.c -- frame buffer device for
3 * Chips & Technologies 65550 chip.
4 *
5 * Copyright (C) 1998 Paul Mackerras
6 *
7 * This file is derived from the Powermac "chips" driver:
8 * Copyright (C) 1997 Fabio Riccardi.
9 * And from the frame buffer device for Open Firmware-initialized devices:
10 * Copyright (C) 1997 Geert Uytterhoeven.
11 *
12 * This file is subject to the terms and conditions of the GNU General Public
13 * License. See the file COPYING in the main directory of this archive for
14 * more details.
15 */
16
17 #include <linux/config.h>
18 #include <linux/module.h>
19 #include <linux/kernel.h>
20 #include <linux/errno.h>
21 #include <linux/string.h>
22 #include <linux/mm.h>
23 #include <linux/tty.h>
24 #include <linux/slab.h>
25 #include <linux/vmalloc.h>
26 #include <linux/delay.h>
27 #include <linux/interrupt.h>
28 #include <linux/fb.h>
29 #include <linux/selection.h>
30 #include <linux/init.h>
31 #include <linux/pci.h>
32 #include <asm/io.h>
33
34 #ifdef CONFIG_FB_COMPAT_XPMAC
35 #include <asm/vc_ioctl.h>
36 #include <asm/pci-bridge.h>
37 #endif
38 #ifdef CONFIG_PMAC_BACKLIGHT
39 #include <asm/backlight.h>
40 #endif
41 #ifdef CONFIG_PMAC_PBOOK
42 #include <linux/adb.h>
43 #include <linux/pmu.h>
44 #endif
45
46 #include <video/fbcon.h>
47 #include <video/fbcon-cfb8.h>
48 #include <video/fbcon-cfb16.h>
49 #include <video/macmodes.h>
50
51 static int currcon = 0;
52
53 struct fb_info_chips {
54 struct fb_info info;
55 struct fb_fix_screeninfo fix;
56 struct fb_var_screeninfo var;
57 struct display disp;
58 struct {
59 __u8 red, green, blue;
60 } palette[256];
61 struct pci_dev *pdev;
62 unsigned long frame_buffer_phys;
63 __u8 *frame_buffer;
64 unsigned long blitter_regs_phys;
65 __u32 *blitter_regs;
66 unsigned long blitter_data_phys;
67 __u8 *blitter_data;
68 struct fb_info_chips *next;
69 #ifdef CONFIG_PMAC_PBOOK
70 unsigned char *save_framebuffer;
71 #endif
72 #ifdef FBCON_HAS_CFB16
73 u16 fbcon_cfb16_cmap[16];
74 #endif
75 };
76
77 #define write_ind(num, val, ap, dp) do { \
78 outb((num), (ap)); outb((val), (dp)); \
79 } while (0)
80 #define read_ind(num, var, ap, dp) do { \
81 outb((num), (ap)); var = inb((dp)); \
82 } while (0);
83
84 /* extension registers */
85 #define write_xr(num, val) write_ind(num, val, 0x3d6, 0x3d7)
86 #define read_xr(num, var) read_ind(num, var, 0x3d6, 0x3d7)
87 /* flat panel registers */
88 #define write_fr(num, val) write_ind(num, val, 0x3d0, 0x3d1)
89 #define read_fr(num, var) read_ind(num, var, 0x3d0, 0x3d1)
90 /* CRTC registers */
91 #define write_cr(num, val) write_ind(num, val, 0x3d4, 0x3d5)
92 #define read_cr(num, var) read_ind(num, var, 0x3d4, 0x3d5)
93 /* graphics registers */
94 #define write_gr(num, val) write_ind(num, val, 0x3ce, 0x3cf)
95 #define read_gr(num, var) read_ind(num, var, 0x3ce, 0x3cf)
96 /* sequencer registers */
97 #define write_sr(num, val) write_ind(num, val, 0x3c4, 0x3c5)
98 #define read_sr(num, var) read_ind(num, var, 0x3c4, 0x3c5)
99 /* attribute registers - slightly strange */
100 #define write_ar(num, val) do { \
101 inb(0x3da); write_ind(num, val, 0x3c0, 0x3c0); \
102 } while (0)
103 #define read_ar(num, var) do { \
104 inb(0x3da); read_ind(num, var, 0x3c0, 0x3c1); \
105 } while (0)
106
107 static struct fb_info_chips *all_chips;
108
109 #ifdef CONFIG_PMAC_PBOOK
110 int chips_sleep_notify(struct pmu_sleep_notifier *self, int when);
111 static struct pmu_sleep_notifier chips_sleep_notifier = {
112 chips_sleep_notify, SLEEP_LEVEL_VIDEO,
113 };
114 #endif
115
116 /*
117 * Exported functions
118 */
119 int chips_init(void);
120
121 static void chips_pci_init(struct pci_dev *dp);
122 static int chips_get_fix(struct fb_fix_screeninfo *fix, int con,
123 struct fb_info *info);
124 static int chips_get_var(struct fb_var_screeninfo *var, int con,
125 struct fb_info *info);
126 static int chips_set_var(struct fb_var_screeninfo *var, int con,
127 struct fb_info *info);
128 static int chips_get_cmap(struct fb_cmap *cmap, int kspc, int con,
129 struct fb_info *info);
130 static int chips_set_cmap(struct fb_cmap *cmap, int kspc, int con,
131 struct fb_info *info);
132
133 static struct fb_ops chipsfb_ops = {
134 owner: THIS_MODULE,
135 fb_get_fix: chips_get_fix,
136 fb_get_var: chips_get_var,
137 fb_set_var: chips_set_var,
138 fb_get_cmap: chips_get_cmap,
139 fb_set_cmap: chips_set_cmap,
140 };
141
142 static int chipsfb_getcolreg(u_int regno, u_int *red, u_int *green,
143 u_int *blue, u_int *transp, struct fb_info *info);
144 static int chipsfb_setcolreg(u_int regno, u_int red, u_int green, u_int blue,
145 u_int transp, struct fb_info *info);
146 static void do_install_cmap(int con, struct fb_info *info);
147 static void chips_set_bitdepth(struct fb_info_chips *p, struct display* disp, int con, int bpp);
148
149 static int chips_get_fix(struct fb_fix_screeninfo *fix, int con,
150 struct fb_info *info)
151 {
152 struct fb_info_chips *cp = (struct fb_info_chips *) info;
153
154 *fix = cp->fix;
155 return 0;
156 }
157
158 static int chips_get_var(struct fb_var_screeninfo *var, int con,
159 struct fb_info *info)
160 {
161 struct fb_info_chips *cp = (struct fb_info_chips *) info;
162
163 *var = cp->var;
164 return 0;
165 }
166
167 static int chips_set_var(struct fb_var_screeninfo *var, int con,
168 struct fb_info *info)
169 {
170 struct fb_info_chips *cp = (struct fb_info_chips *) info;
171 struct display *disp = (con >= 0)? &fb_display[con]: &cp->disp;
172
173 if (var->xres > 800 || var->yres > 600
174 || var->xres_virtual > 800 || var->yres_virtual > 600
175 || (var->bits_per_pixel != 8 && var->bits_per_pixel != 16)
176 || var->nonstd
177 || (var->vmode & FB_VMODE_MASK) != FB_VMODE_NONINTERLACED)
178 return -EINVAL;
179
180 if ((var->activate & FB_ACTIVATE_MASK) == FB_ACTIVATE_NOW &&
181 var->bits_per_pixel != disp->var.bits_per_pixel) {
182 chips_set_bitdepth(cp, disp, con, var->bits_per_pixel);
183 }
184
185 return 0;
186 }
187
188 static int chips_get_cmap(struct fb_cmap *cmap, int kspc, int con,
189 struct fb_info *info)
190 {
191 if (con == currcon) /* current console? */
192 return fb_get_cmap(cmap, kspc, chipsfb_getcolreg, info);
193 if (fb_display[con].cmap.len) /* non default colormap? */
194 fb_copy_cmap(&fb_display[con].cmap, cmap, kspc ? 0 : 2);
195 else {
196 int size = fb_display[con].var.bits_per_pixel == 16 ? 32 : 256;
197 fb_copy_cmap(fb_default_cmap(size), cmap, kspc ? 0 : 2);
198 }
199 return 0;
200 }
201
202 static int chips_set_cmap(struct fb_cmap *cmap, int kspc, int con,
203 struct fb_info *info)
204 {
205 int err;
206
207 if (!fb_display[con].cmap.len) { /* no colormap allocated? */
208 int size = fb_display[con].var.bits_per_pixel == 16 ? 32 : 256;
209 if ((err = fb_alloc_cmap(&fb_display[con].cmap, size, 0)))
210 return err;
211 }
212 if (con == currcon) /* current console? */
213 return fb_set_cmap(cmap, kspc, chipsfb_setcolreg, info);
214 else
215 fb_copy_cmap(cmap, &fb_display[con].cmap, kspc ? 0 : 1);
216 return 0;
217 }
218
219 static int chipsfbcon_switch(int con, struct fb_info *info)
220 {
221 struct fb_info_chips *p = (struct fb_info_chips *) info;
222 int new_bpp, old_bpp;
223
224 /* Do we have to save the colormap? */
225 if (fb_display[currcon].cmap.len)
226 fb_get_cmap(&fb_display[currcon].cmap, 1, chipsfb_getcolreg, info);
227
228 new_bpp = fb_display[con].var.bits_per_pixel;
229 old_bpp = fb_display[currcon].var.bits_per_pixel;
230 currcon = con;
231
232 if (new_bpp != old_bpp)
233 chips_set_bitdepth(p, &fb_display[con], con, new_bpp);
234
235 do_install_cmap(con, info);
236 return 0;
237 }
238
239 static int chipsfb_updatevar(int con, struct fb_info *info)
240 {
241 return 0;
242 }
243
244 static void chipsfb_blank(int blank, struct fb_info *info)
245 {
246 struct fb_info_chips *p = (struct fb_info_chips *) info;
247 int i;
248
249 // used to disable backlight only for blank > 1, but it seems
250 // useful at blank = 1 too (saves battery, extends backlight life)
251 if (blank) {
252 #ifdef CONFIG_PMAC_BACKLIGHT
253 set_backlight_enable(0);
254 #endif /* CONFIG_PMAC_BACKLIGHT */
255 /* get the palette from the chip */
256 for (i = 0; i < 256; ++i) {
257 outb(i, 0x3c7);
258 udelay(1);
259 p->palette[i].red = inb(0x3c9);
260 p->palette[i].green = inb(0x3c9);
261 p->palette[i].blue = inb(0x3c9);
262 }
263 for (i = 0; i < 256; ++i) {
264 outb(i, 0x3c8);
265 udelay(1);
266 outb(0, 0x3c9);
267 outb(0, 0x3c9);
268 outb(0, 0x3c9);
269 }
270 } else {
271 #ifdef CONFIG_PMAC_BACKLIGHT
272 set_backlight_enable(1);
273 #endif /* CONFIG_PMAC_BACKLIGHT */
274 for (i = 0; i < 256; ++i) {
275 outb(i, 0x3c8);
276 udelay(1);
277 outb(p->palette[i].red, 0x3c9);
278 outb(p->palette[i].green, 0x3c9);
279 outb(p->palette[i].blue, 0x3c9);
280 }
281 }
282 }
283
284 static int chipsfb_getcolreg(u_int regno, u_int *red, u_int *green,
285 u_int *blue, u_int *transp, struct fb_info *info)
286 {
287 struct fb_info_chips *p = (struct fb_info_chips *) info;
288
289 if (regno > 255)
290 return 1;
291 *red = (p->palette[regno].red<<8) | p->palette[regno].red;
292 *green = (p->palette[regno].green<<8) | p->palette[regno].green;
293 *blue = (p->palette[regno].blue<<8) | p->palette[regno].blue;
294 *transp = 0;
295 return 0;
296 }
297
298 static int chipsfb_setcolreg(u_int regno, u_int red, u_int green, u_int blue,
299 u_int transp, struct fb_info *info)
300 {
301 struct fb_info_chips *p = (struct fb_info_chips *) info;
302
303 if (regno > 255)
304 return 1;
305 red >>= 8;
306 green >>= 8;
307 blue >>= 8;
308 p->palette[regno].red = red;
309 p->palette[regno].green = green;
310 p->palette[regno].blue = blue;
311 outb(regno, 0x3c8);
312 udelay(1);
313 outb(red, 0x3c9);
314 outb(green, 0x3c9);
315 outb(blue, 0x3c9);
316
317 #ifdef FBCON_HAS_CFB16
318 if (regno < 16)
319 p->fbcon_cfb16_cmap[regno] = ((red & 0xf8) << 7)
320 | ((green & 0xf8) << 2) | ((blue & 0xf8) >> 3);
321 #endif
322
323 return 0;
324 }
325
326 static void do_install_cmap(int con, struct fb_info *info)
327 {
328 if (con != currcon)
329 return;
330 if (fb_display[con].cmap.len)
331 fb_set_cmap(&fb_display[con].cmap, 1, chipsfb_setcolreg, info);
332 else {
333 int size = fb_display[con].var.bits_per_pixel == 16 ? 32 : 256;
334 fb_set_cmap(fb_default_cmap(size), 1, chipsfb_setcolreg, info);
335 }
336 }
337
338 static void chips_set_bitdepth(struct fb_info_chips *p, struct display* disp, int con, int bpp)
339 {
340 int err;
341 struct fb_fix_screeninfo* fix = &p->fix;
342 struct fb_var_screeninfo* var = &p->var;
343
344 if (bpp == 16) {
345 if (con == currcon) {
346 write_cr(0x13, 200); // Set line length (doublewords)
347 write_xr(0x81, 0x14); // 15 bit (555) color mode
348 write_xr(0x82, 0x00); // Disable palettes
349 write_xr(0x20, 0x10); // 16 bit blitter mode
350 }
351
352 fix->line_length = 800*2;
353 fix->visual = FB_VISUAL_TRUECOLOR;
354
355 var->red.offset = 10;
356 var->green.offset = 5;
357 var->blue.offset = 0;
358 var->red.length = var->green.length = var->blue.length = 5;
359
360 #ifdef FBCON_HAS_CFB16
361 disp->dispsw = &fbcon_cfb16;
362 disp->dispsw_data = p->fbcon_cfb16_cmap;
363 #else
364 disp->dispsw = &fbcon_dummy;
365 #endif
366 } else if (bpp == 8) {
367 if (con == currcon) {
368 write_cr(0x13, 100); // Set line length (doublewords)
369 write_xr(0x81, 0x12); // 8 bit color mode
370 write_xr(0x82, 0x08); // Graphics gamma enable
371 write_xr(0x20, 0x00); // 8 bit blitter mode
372 }
373
374 fix->line_length = 800;
375 fix->visual = FB_VISUAL_PSEUDOCOLOR;
376
377 var->red.offset = var->green.offset = var->blue.offset = 0;
378 var->red.length = var->green.length = var->blue.length = 8;
379
380 #ifdef FBCON_HAS_CFB8
381 disp->dispsw = &fbcon_cfb8;
382 #else
383 disp->dispsw = &fbcon_dummy;
384 #endif
385 }
386
387 var->bits_per_pixel = bpp;
388 disp->line_length = p->fix.line_length;
389 disp->visual = fix->visual;
390 disp->var = *var;
391
392 #ifdef CONFIG_FB_COMPAT_XPMAC
393 display_info.depth = bpp;
394 display_info.pitch = fix->line_length;
395 #endif
396
397 if (p->info.changevar)
398 (*p->info.changevar)(con);
399
400 if ((err = fb_alloc_cmap(&disp->cmap, 0, 0)))
401 return;
402 do_install_cmap(con, (struct fb_info *)p);
403 }
404
405 struct chips_init_reg {
406 unsigned char addr;
407 unsigned char data;
408 };
409
410 #define N_ELTS(x) (sizeof(x) / sizeof(x[0]))
411
412 static struct chips_init_reg chips_init_sr[] = {
413 { 0x00, 0x03 },
414 { 0x01, 0x01 },
415 { 0x02, 0x0f },
416 { 0x04, 0x0e }
417 };
418
419 static struct chips_init_reg chips_init_gr[] = {
420 { 0x05, 0x00 },
421 { 0x06, 0x0d },
422 { 0x08, 0xff }
423 };
424
425 static struct chips_init_reg chips_init_ar[] = {
426 { 0x10, 0x01 },
427 { 0x12, 0x0f },
428 { 0x13, 0x00 }
429 };
430
431 static struct chips_init_reg chips_init_cr[] = {
432 { 0x00, 0x7f },
433 { 0x01, 0x63 },
434 { 0x02, 0x63 },
435 { 0x03, 0x83 },
436 { 0x04, 0x66 },
437 { 0x05, 0x10 },
438 { 0x06, 0x72 },
439 { 0x07, 0x3e },
440 { 0x08, 0x00 },
441 { 0x09, 0x40 },
442 { 0x0c, 0x00 },
443 { 0x0d, 0x00 },
444 { 0x10, 0x59 },
445 { 0x11, 0x0d },
446 { 0x12, 0x57 },
447 { 0x13, 0x64 },
448 { 0x14, 0x00 },
449 { 0x15, 0x57 },
450 { 0x16, 0x73 },
451 { 0x17, 0xe3 },
452 { 0x18, 0xff },
453 { 0x30, 0x02 },
454 { 0x31, 0x02 },
455 { 0x32, 0x02 },
456 { 0x33, 0x02 },
457 { 0x40, 0x00 },
458 { 0x41, 0x00 },
459 { 0x40, 0x80 }
460 };
461
462 static struct chips_init_reg chips_init_fr[] = {
463 { 0x01, 0x02 },
464 { 0x03, 0x08 },
465 { 0x04, 0x81 },
466 { 0x05, 0x21 },
467 { 0x08, 0x0c },
468 { 0x0a, 0x74 },
469 { 0x0b, 0x11 },
470 { 0x10, 0x0c },
471 { 0x11, 0xe0 },
472 /* { 0x12, 0x40 }, -- 3400 needs 40, 2400 needs 48, no way to tell */
473 { 0x20, 0x63 },
474 { 0x21, 0x68 },
475 { 0x22, 0x19 },
476 { 0x23, 0x7f },
477 { 0x24, 0x68 },
478 { 0x26, 0x00 },
479 { 0x27, 0x0f },
480 { 0x30, 0x57 },
481 { 0x31, 0x58 },
482 { 0x32, 0x0d },
483 { 0x33, 0x72 },
484 { 0x34, 0x02 },
485 { 0x35, 0x22 },
486 { 0x36, 0x02 },
487 { 0x37, 0x00 }
488 };
489
490 static struct chips_init_reg chips_init_xr[] = {
491 { 0xce, 0x00 }, /* set default memory clock */
492 { 0xcc, 0x43 }, /* memory clock ratio */
493 { 0xcd, 0x18 },
494 { 0xce, 0xa1 },
495 { 0xc8, 0x84 },
496 { 0xc9, 0x0a },
497 { 0xca, 0x00 },
498 { 0xcb, 0x20 },
499 { 0xcf, 0x06 },
500 { 0xd0, 0x0e },
501 { 0x09, 0x01 },
502 { 0x0a, 0x02 },
503 { 0x0b, 0x01 },
504 { 0x20, 0x00 },
505 { 0x40, 0x03 },
506 { 0x41, 0x01 },
507 { 0x42, 0x00 },
508 { 0x80, 0x82 },
509 { 0x81, 0x12 },
510 { 0x82, 0x08 },
511 { 0xa0, 0x00 },
512 { 0xa8, 0x00 }
513 };
514
515 static void __init chips_hw_init(struct fb_info_chips *p)
516 {
517 int i;
518
519 for (i = 0; i < N_ELTS(chips_init_xr); ++i)
520 write_xr(chips_init_xr[i].addr, chips_init_xr[i].data);
521 outb(0x29, 0x3c2); /* set misc output reg */
522 for (i = 0; i < N_ELTS(chips_init_sr); ++i)
523 write_sr(chips_init_sr[i].addr, chips_init_sr[i].data);
524 for (i = 0; i < N_ELTS(chips_init_gr); ++i)
525 write_gr(chips_init_gr[i].addr, chips_init_gr[i].data);
526 for (i = 0; i < N_ELTS(chips_init_ar); ++i)
527 write_ar(chips_init_ar[i].addr, chips_init_ar[i].data);
528 for (i = 0; i < N_ELTS(chips_init_cr); ++i)
529 write_cr(chips_init_cr[i].addr, chips_init_cr[i].data);
530 for (i = 0; i < N_ELTS(chips_init_fr); ++i)
531 write_fr(chips_init_fr[i].addr, chips_init_fr[i].data);
532 }
533
534 static void __init init_chips(struct fb_info_chips *p)
535 {
536 int i;
537
538 strcpy(p->fix.id, "C&T 65550");
539 p->fix.smem_start = p->frame_buffer_phys;
540
541 // FIXME: Assumes 1MB frame buffer, but 65550 supports 1MB or 2MB.
542 // * "3500" PowerBook G3 (the original PB G3) has 2MB.
543 // * 2400 has 1MB composed of 2 Mitsubishi M5M4V4265CTP DRAM chips.
544 // Motherboard actually supports 2MB -- there are two blank locations
545 // for a second pair of DRAMs. (Thanks, Apple!)
546 // * 3400 has 1MB (I think). Don't know if it's expandable.
547 // -- Tim Seufert
548 p->fix.smem_len = 0x100000; // 1MB
549 p->fix.type = FB_TYPE_PACKED_PIXELS;
550 p->fix.visual = FB_VISUAL_PSEUDOCOLOR;
551 p->fix.line_length = 800;
552
553 p->var.xres = 800;
554 p->var.yres = 600;
555 p->var.xres_virtual = 800;
556 p->var.yres_virtual = 600;
557 p->var.bits_per_pixel = 8;
558 p->var.red.length = p->var.green.length = p->var.blue.length = 8;
559 p->var.height = p->var.width = -1;
560 p->var.vmode = FB_VMODE_NONINTERLACED;
561 p->var.pixclock = 10000;
562 p->var.left_margin = p->var.right_margin = 16;
563 p->var.upper_margin = p->var.lower_margin = 16;
564 p->var.hsync_len = p->var.vsync_len = 8;
565
566 p->disp.var = p->var;
567 p->disp.cmap.red = NULL;
568 p->disp.cmap.green = NULL;
569 p->disp.cmap.blue = NULL;
570 p->disp.cmap.transp = NULL;
571 p->disp.screen_base = p->frame_buffer;
572 p->disp.visual = p->fix.visual;
573 p->disp.type = p->fix.type;
574 p->disp.type_aux = p->fix.type_aux;
575 p->disp.line_length = p->fix.line_length;
576 p->disp.can_soft_blank = 1;
577 p->disp.dispsw = &fbcon_cfb8;
578 p->disp.scrollmode = SCROLL_YREDRAW;
579
580 strcpy(p->info.modename, p->fix.id);
581 p->info.node = -1;
582 p->info.fbops = &chipsfb_ops;
583 p->info.disp = &p->disp;
584 p->info.fontname[0] = 0;
585 p->info.changevar = NULL;
586 p->info.switch_con = &chipsfbcon_switch;
587 p->info.updatevar = &chipsfb_updatevar;
588 p->info.blank = &chipsfb_blank;
589 p->info.flags = FBINFO_FLAG_DEFAULT;
590
591 for (i = 0; i < 16; ++i) {
592 int j = color_table[i];
593 p->palette[i].red = default_red[j];
594 p->palette[i].green = default_grn[j];
595 p->palette[i].blue = default_blu[j];
596 }
597
598 if (register_framebuffer(&p->info) < 0) {
599 kfree(p);
600 return;
601 }
602
603 printk("fb%d: Chips 65550 frame buffer (%dK RAM detected)\n",
604 GET_FB_IDX(p->info.node), p->fix.smem_len / 1024);
605
606 chips_hw_init(p);
607
608 #ifdef CONFIG_FB_COMPAT_XPMAC
609 if (!console_fb_info) {
610 unsigned long iobase;
611
612 display_info.height = p->var.yres;
613 display_info.width = p->var.xres;
614 display_info.depth = 8;
615 display_info.pitch = p->fix.line_length;
616 display_info.mode = VMODE_800_600_60;
617 strncpy(display_info.name, "chips65550",
618 sizeof(display_info.name));
619 display_info.fb_address = p->frame_buffer_phys;
620 iobase = pci_bus_io_base_phys(p->pdev->bus->number);
621 display_info.cmap_adr_address = iobase + 0x3c8;
622 display_info.cmap_data_address = iobase + 0x3c9;
623 display_info.disp_reg_address = p->blitter_regs_phys;
624 console_fb_info = &p->info;
625 }
626 #endif /* CONFIG_FB_COMPAT_XPMAC */
627
628 #ifdef CONFIG_PMAC_PBOOK
629 if (all_chips == NULL)
630 pmu_register_sleep_notifier(&chips_sleep_notifier);
631 #endif /* CONFIG_PMAC_PBOOK */
632 p->next = all_chips;
633 all_chips = p;
634 }
635
636 int __init chips_init(void)
637 {
638 struct pci_dev *dp = NULL;
639
640 while ((dp = pci_find_device(PCI_VENDOR_ID_CT,
641 PCI_DEVICE_ID_CT_65550, dp)) != NULL)
642 if ((dp->class >> 16) == PCI_BASE_CLASS_DISPLAY)
643 chips_pci_init(dp);
644 return all_chips? 0: -ENODEV;
645 }
646
647 static void __init chips_pci_init(struct pci_dev *dp)
648 {
649 struct fb_info_chips *p;
650 unsigned long addr, size;
651 unsigned short cmd;
652
653 if ((dp->resource[0].flags & IORESOURCE_MEM) == 0)
654 return;
655 addr = dp->resource[0].start;
656 size = dp->resource[0].end + 1 - addr;
657 if (addr == 0)
658 return;
659 p = kmalloc(sizeof(*p), GFP_ATOMIC);
660 if (p == 0)
661 return;
662 memset(p, 0, sizeof(*p));
663 if (!request_mem_region(addr, size, "chipsfb")) {
664 kfree(p);
665 return;
666 }
667 #ifdef __BIG_ENDIAN
668 addr += 0x800000; // Use big-endian aperture
669 #endif
670 p->pdev = dp;
671 p->frame_buffer_phys = addr;
672 p->frame_buffer = __ioremap(addr, 0x200000, _PAGE_NO_CACHE);
673 p->blitter_regs_phys = addr + 0x400000;
674 p->blitter_regs = ioremap(addr + 0x400000, 0x1000);
675 p->blitter_data_phys = addr + 0x410000;
676 p->blitter_data = ioremap(addr + 0x410000, 0x10000);
677
678 /* we should use pci_enable_device here, but,
679 the device doesn't declare its I/O ports in its BARs
680 so pci_enable_device won't turn on I/O responses */
681 pci_read_config_word(dp, PCI_COMMAND, &cmd);
682 cmd |= 3; /* enable memory and IO space */
683 pci_write_config_word(dp, PCI_COMMAND, cmd);
684
685 /* Clear the entire framebuffer */
686 memset(p->frame_buffer, 0, 0x100000);
687
688 #ifdef CONFIG_PMAC_BACKLIGHT
689 /* turn on the backlight */
690 set_backlight_enable(1);
691 #endif /* CONFIG_PMAC_BACKLIGHT */
692
693 init_chips(p);
694 }
695
696 #ifdef CONFIG_PMAC_PBOOK
697 /*
698 * Save the contents of the frame buffer when we go to sleep,
699 * and restore it when we wake up again.
700 */
701 int
702 chips_sleep_notify(struct pmu_sleep_notifier *self, int when)
703 {
704 struct fb_info_chips *p;
705
706 for (p = all_chips; p != NULL; p = p->next) {
707 int nb = p->var.yres * p->fix.line_length;
708
709 switch (when) {
710 case PBOOK_SLEEP_REQUEST:
711 p->save_framebuffer = vmalloc(nb);
712 if (p->save_framebuffer == NULL)
713 return PBOOK_SLEEP_REFUSE;
714 break;
715 case PBOOK_SLEEP_REJECT:
716 if (p->save_framebuffer) {
717 vfree(p->save_framebuffer);
718 p->save_framebuffer = 0;
719 }
720 break;
721
722 case PBOOK_SLEEP_NOW:
723 chipsfb_blank(1, (struct fb_info *)p);
724 if (p->save_framebuffer)
725 memcpy(p->save_framebuffer,
726 p->frame_buffer, nb);
727 break;
728 case PBOOK_WAKE:
729 if (p->save_framebuffer) {
730 memcpy(p->frame_buffer,
731 p->save_framebuffer, nb);
732 vfree(p->save_framebuffer);
733 p->save_framebuffer = 0;
734 }
735 chipsfb_blank(0, (struct fb_info *)p);
736 break;
737 }
738 }
739 return PBOOK_SLEEP_OK;
740 }
741 #endif /* CONFIG_PMAC_PBOOK */
742
743 MODULE_LICENSE("GPL");
744