File: /usr/src/linux/arch/ia64/ia32/ia32_support.c
1 /*
2 * IA32 helper functions
3 *
4 * Copyright (C) 1999 Arun Sharma <arun.sharma@intel.com>
5 * Copyright (C) 2000 Asit K. Mallick <asit.k.mallick@intel.com>
6 * Copyright (C) 2001 Hewlett-Packard Co
7 * Copyright (C) 2001 David Mosberger-Tang <davidm@hpl.hp.com>
8 *
9 * 06/16/00 A. Mallick added csd/ssd/tssd for ia32 thread context
10 * 02/19/01 D. Mosberger dropped tssd; it's not needed
11 */
12
13 #include <linux/kernel.h>
14 #include <linux/init.h>
15 #include <linux/mm.h>
16 #include <linux/sched.h>
17
18 #include <asm/page.h>
19 #include <asm/pgtable.h>
20 #include <asm/system.h>
21 #include <asm/processor.h>
22 #include <asm/ia32.h>
23
24 extern unsigned long *ia32_gdt_table, *ia32_tss;
25
26 extern void die_if_kernel (char *str, struct pt_regs *regs, long err);
27
28 void
29 ia32_save_state (struct task_struct *t)
30 {
31 unsigned long eflag, fsr, fcr, fir, fdr, csd, ssd;
32
33 asm ("mov %0=ar.eflag;"
34 "mov %1=ar.fsr;"
35 "mov %2=ar.fcr;"
36 "mov %3=ar.fir;"
37 "mov %4=ar.fdr;"
38 "mov %5=ar.csd;"
39 "mov %6=ar.ssd;"
40 : "=r"(eflag), "=r"(fsr), "=r"(fcr), "=r"(fir), "=r"(fdr), "=r"(csd), "=r"(ssd));
41 t->thread.eflag = eflag;
42 t->thread.fsr = fsr;
43 t->thread.fcr = fcr;
44 t->thread.fir = fir;
45 t->thread.fdr = fdr;
46 t->thread.csd = csd;
47 t->thread.ssd = ssd;
48 ia64_set_kr(IA64_KR_IO_BASE, t->thread.old_iob);
49 }
50
51 void
52 ia32_load_state (struct task_struct *t)
53 {
54 unsigned long eflag, fsr, fcr, fir, fdr, csd, ssd;
55 struct pt_regs *regs = ia64_task_regs(t);
56 int nr;
57
58 eflag = t->thread.eflag;
59 fsr = t->thread.fsr;
60 fcr = t->thread.fcr;
61 fir = t->thread.fir;
62 fdr = t->thread.fdr;
63 csd = t->thread.csd;
64 ssd = t->thread.ssd;
65
66 asm volatile ("mov ar.eflag=%0;"
67 "mov ar.fsr=%1;"
68 "mov ar.fcr=%2;"
69 "mov ar.fir=%3;"
70 "mov ar.fdr=%4;"
71 "mov ar.csd=%5;"
72 "mov ar.ssd=%6;"
73 :: "r"(eflag), "r"(fsr), "r"(fcr), "r"(fir), "r"(fdr), "r"(csd), "r"(ssd));
74 current->thread.old_iob = ia64_get_kr(IA64_KR_IO_BASE);
75 ia64_set_kr(IA64_KR_IO_BASE, IA32_IOBASE);
76
77 /* load TSS and LDT while preserving SS and CS: */
78 nr = smp_processor_id();
79 regs->r17 = (_TSS(nr) << 48) | (_LDT(nr) << 32) | (__u32) regs->r17;
80 }
81
82 /*
83 * Setup IA32 GDT and TSS
84 */
85 void
86 ia32_gdt_init (void)
87 {
88 unsigned long gdt_and_tss_page, ldt_size;
89 int nr;
90
91 /* allocate two IA-32 pages of memory: */
92 gdt_and_tss_page = __get_free_pages(GFP_KERNEL,
93 (IA32_PAGE_SHIFT < PAGE_SHIFT)
94 ? 0 : (IA32_PAGE_SHIFT + 1) - PAGE_SHIFT);
95 ia32_gdt_table = (unsigned long *) gdt_and_tss_page;
96 ia32_tss = (unsigned long *) (gdt_and_tss_page + IA32_PAGE_SIZE);
97
98 /* Zero the gdt and tss */
99 memset((void *) gdt_and_tss_page, 0, 2*IA32_PAGE_SIZE);
100
101 /* CS descriptor in IA-32 (scrambled) format */
102 ia32_gdt_table[__USER_CS >> 3] =
103 IA32_SEG_DESCRIPTOR(0, (IA32_PAGE_OFFSET - 1) >> IA32_PAGE_SHIFT,
104 0xb, 1, 3, 1, 1, 1, 1);
105
106 /* DS descriptor in IA-32 (scrambled) format */
107 ia32_gdt_table[__USER_DS >> 3] =
108 IA32_SEG_DESCRIPTOR(0, (IA32_PAGE_OFFSET - 1) >> IA32_PAGE_SHIFT,
109 0x3, 1, 3, 1, 1, 1, 1);
110
111 /* We never change the TSS and LDT descriptors, so we can share them across all CPUs. */
112 ldt_size = PAGE_ALIGN(IA32_LDT_ENTRIES*IA32_LDT_ENTRY_SIZE);
113 for (nr = 0; nr < NR_CPUS; ++nr) {
114 ia32_gdt_table[_TSS(nr)] = IA32_SEG_DESCRIPTOR(IA32_TSS_OFFSET, 235,
115 0xb, 0, 3, 1, 1, 1, 0);
116 ia32_gdt_table[_LDT(nr)] = IA32_SEG_DESCRIPTOR(IA32_LDT_OFFSET, ldt_size - 1,
117 0x2, 0, 3, 1, 1, 1, 0);
118 }
119 }
120
121 /*
122 * Handle bad IA32 interrupt via syscall
123 */
124 void
125 ia32_bad_interrupt (unsigned long int_num, struct pt_regs *regs)
126 {
127 siginfo_t siginfo;
128
129 die_if_kernel("Bad IA-32 interrupt", regs, int_num);
130
131 siginfo.si_signo = SIGTRAP;
132 siginfo.si_errno = int_num; /* XXX is it OK to abuse si_errno like this? */
133 siginfo.si_code = TRAP_BRKPT;
134 force_sig_info(SIGTRAP, &siginfo, current);
135 }
136