File: /usr/src/linux/arch/ppc/kernel/ppc_asm.h
1 /*
2 * BK Id: SCCS/s.ppc_asm.h 1.16 08/15/01 22:43:06 paulus
3 */
4 /*
5 * arch/ppc/kernel/ppc_asm.h
6 *
7 * Definitions used by various bits of low-level assembly code on PowerPC.
8 *
9 * Copyright (C) 1995-1999 Gary Thomas, Paul Mackerras, Cort Dougan.
10 *
11 * This program is free software; you can redistribute it and/or
12 * modify it under the terms of the GNU General Public License
13 * as published by the Free Software Foundation; either version
14 * 2 of the License, or (at your option) any later version.
15 */
16
17 #include <linux/config.h>
18
19 #include "ppc_asm.tmpl"
20 #include "ppc_defs.h"
21
22 /*
23 * Macros for storing registers into and loading registers from
24 * exception frames.
25 */
26 #define SAVE_GPR(n, base) stw n,GPR0+4*(n)(base)
27 #define SAVE_2GPRS(n, base) SAVE_GPR(n, base); SAVE_GPR(n+1, base)
28 #define SAVE_4GPRS(n, base) SAVE_2GPRS(n, base); SAVE_2GPRS(n+2, base)
29 #define SAVE_8GPRS(n, base) SAVE_4GPRS(n, base); SAVE_4GPRS(n+4, base)
30 #define SAVE_10GPRS(n, base) SAVE_8GPRS(n, base); SAVE_2GPRS(n+8, base)
31 #define REST_GPR(n, base) lwz n,GPR0+4*(n)(base)
32 #define REST_2GPRS(n, base) REST_GPR(n, base); REST_GPR(n+1, base)
33 #define REST_4GPRS(n, base) REST_2GPRS(n, base); REST_2GPRS(n+2, base)
34 #define REST_8GPRS(n, base) REST_4GPRS(n, base); REST_4GPRS(n+4, base)
35 #define REST_10GPRS(n, base) REST_8GPRS(n, base); REST_2GPRS(n+8, base)
36
37 #define SAVE_FPR(n, base) stfd n,THREAD_FPR0+8*(n)(base)
38 #define SAVE_2FPRS(n, base) SAVE_FPR(n, base); SAVE_FPR(n+1, base)
39 #define SAVE_4FPRS(n, base) SAVE_2FPRS(n, base); SAVE_2FPRS(n+2, base)
40 #define SAVE_8FPRS(n, base) SAVE_4FPRS(n, base); SAVE_4FPRS(n+4, base)
41 #define SAVE_16FPRS(n, base) SAVE_8FPRS(n, base); SAVE_8FPRS(n+8, base)
42 #define SAVE_32FPRS(n, base) SAVE_16FPRS(n, base); SAVE_16FPRS(n+16, base)
43 #define REST_FPR(n, base) lfd n,THREAD_FPR0+8*(n)(base)
44 #define REST_2FPRS(n, base) REST_FPR(n, base); REST_FPR(n+1, base)
45 #define REST_4FPRS(n, base) REST_2FPRS(n, base); REST_2FPRS(n+2, base)
46 #define REST_8FPRS(n, base) REST_4FPRS(n, base); REST_4FPRS(n+4, base)
47 #define REST_16FPRS(n, base) REST_8FPRS(n, base); REST_8FPRS(n+8, base)
48 #define REST_32FPRS(n, base) REST_16FPRS(n, base); REST_16FPRS(n+16, base)
49
50 /*
51 * Once a version of gas that understands the AltiVec instructions
52 * is freely available, we can do this the normal way... - paulus
53 */
54 #define LVX(r,a,b) .long (31<<26)+((r)<<21)+((a)<<16)+((b)<<11)+(103<<1)
55 #define STVX(r,a,b) .long (31<<26)+((r)<<21)+((a)<<16)+((b)<<11)+(231<<1)
56 #define MFVSCR(r) .long (4<<26)+((r)<<21)+(770<<1)
57 #define MTVSCR(r) .long (4<<26)+((r)<<11)+(802<<1)
58
59 #define SAVE_VR(n,b,base) li b,THREAD_VR0+(16*(n)); STVX(n,b,base)
60 #define SAVE_2VR(n,b,base) SAVE_VR(n,b,base); SAVE_VR(n+1,b,base)
61 #define SAVE_4VR(n,b,base) SAVE_2VR(n,b,base); SAVE_2VR(n+2,b,base)
62 #define SAVE_8VR(n,b,base) SAVE_4VR(n,b,base); SAVE_4VR(n+4,b,base)
63 #define SAVE_16VR(n,b,base) SAVE_8VR(n,b,base); SAVE_8VR(n+8,b,base)
64 #define SAVE_32VR(n,b,base) SAVE_16VR(n,b,base); SAVE_16VR(n+16,b,base)
65 #define REST_VR(n,b,base) li b,THREAD_VR0+(16*(n)); LVX(n,b,base)
66 #define REST_2VR(n,b,base) REST_VR(n,b,base); REST_VR(n+1,b,base)
67 #define REST_4VR(n,b,base) REST_2VR(n,b,base); REST_2VR(n+2,b,base)
68 #define REST_8VR(n,b,base) REST_4VR(n,b,base); REST_4VR(n+4,b,base)
69 #define REST_16VR(n,b,base) REST_8VR(n,b,base); REST_8VR(n+8,b,base)
70 #define REST_32VR(n,b,base) REST_16VR(n,b,base); REST_16VR(n+16,b,base)
71
72 #ifdef CONFIG_PPC601_SYNC_FIX
73 #define SYNC \
74 BEGIN_FTR_SECTION \
75 sync; \
76 isync; \
77 END_FTR_SECTION_IFSET(CPU_FTR_601)
78 #define SYNC_601 \
79 BEGIN_FTR_SECTION \
80 sync; \
81 END_FTR_SECTION_IFSET(CPU_FTR_601)
82 #define ISYNC_601 \
83 BEGIN_FTR_SECTION \
84 isync; \
85 END_FTR_SECTION_IFSET(CPU_FTR_601)
86 #else
87 #define SYNC
88 #define SYNC_601
89 #define ISYNC_601
90 #endif
91
92 #ifndef CONFIG_SMP
93 #define TLBSYNC
94 #else /* CONFIG_SMP */
95 /* tlbsync is not implemented on 601 */
96 #define TLBSYNC \
97 BEGIN_FTR_SECTION \
98 tlbsync; \
99 sync; \
100 END_FTR_SECTION_IFCLR(CPU_FTR_601)
101 #endif
102
103 /*
104 * This instruction is not implemented on the PPC 603 or 601; however, on
105 * the 403GCX and 405GP tlbia IS defined and tlbie is not.
106 * All of these instructions exist in the 8xx, they have magical powers,
107 * and they must be used.
108 */
109
110 #if !defined(CONFIG_4xx) && !defined(CONFIG_8xx)
111 #define tlbia \
112 li r4,1024; \
113 mtctr r4; \
114 lis r4,KERNELBASE@h; \
115 0: tlbie r4; \
116 addi r4,r4,0x1000; \
117 bdnz 0b
118 #endif
119
120 /*
121 * On APUS (Amiga PowerPC cpu upgrade board), we don't know the
122 * physical base address of RAM at compile time.
123 */
124 #define tophys(rd,rs) \
125 0: addis rd,rs,-KERNELBASE@h; \
126 .section ".vtop_fixup","aw"; \
127 .align 1; \
128 .long 0b; \
129 .previous
130
131 #define tovirt(rd,rs) \
132 0: addis rd,rs,KERNELBASE@h; \
133 .section ".ptov_fixup","aw"; \
134 .align 1; \
135 .long 0b; \
136 .previous
137
138 /*
139 * On 64-bit cpus, we use the rfid instruction instead of rfi, but
140 * we then have to make sure we preserve the top 32 bits except for
141 * the 64-bit mode bit, which we clear.
142 */
143 #ifdef CONFIG_PPC64BRIDGE
144 #define FIX_SRR1(ra, rb) \
145 mr rb,ra; \
146 mfmsr ra; \
147 clrldi ra,ra,1; /* turn off 64-bit mode */ \
148 rldimi ra,rb,0,32
149 #define RFI .long 0x4c000024 /* rfid instruction */
150 #define MTMSRD(r) .long (0x7c000164 + ((r) << 21)) /* mtmsrd */
151 #define CLR_TOP32(r) rlwinm (r),(r),0,0,31 /* clear top 32 bits */
152
153 #else
154 #define FIX_SRR1(ra, rb)
155 #define RFI rfi
156 #define MTMSRD(r) mtmsr r
157 #define CLR_TOP32(r)
158 #endif /* CONFIG_PPC64BRIDGE */
159
160 /*
161 * Defines for cache-line size etc.
162 */
163 #if defined(CONFIG_4xx) || defined(CONFIG_8xx)
164 #define CACHE_LINE_SIZE 16
165 #define LG_CACHE_LINE_SIZE 4
166 #define MAX_COPY_PREFETCH 1
167
168 #elif !defined(CONFIG_PPC64BRIDGE)
169 #define CACHE_LINE_SIZE 32
170 #define LG_CACHE_LINE_SIZE 5
171 #define MAX_COPY_PREFETCH 4
172
173 #else
174 #define CACHE_LINE_SIZE 128
175 #define LG_CACHE_LINE_SIZE 7
176 #define MAX_COPY_PREFETCH 1
177 #endif /* CONFIG_4xx || CONFIG_8xx */
178