File: /usr/src/linux/include/asm-ia64/sn/eeprom.h
1 /* $Id$
2 *
3 * This file is subject to the terms and conditions of the GNU General Public
4 * License. See the file "COPYING" in the main directory of this archive
5 * for more details.
6 *
7 * Public interface for reading Atmel EEPROMs via L1 system controllers
8 *
9 * Copyright (C) 1992 - 1997, 2000 Silicon Graphics, Inc.
10 * Copyright (C) 2000 by Colin Ngam
11 */
12 #ifndef _ASM_SN_EEPROM_H
13 #define _ASM_SN_EEPROM_H
14
15 #include <asm/sn/sgi.h>
16 #include <asm/sn/vector.h>
17 #include <asm/sn/xtalk/xbow.h>
18 #include <asm/sn/pci/bridge.h>
19 #include <asm/sn/nic.h>
20
21 /*
22 * The following structures are an implementation of the EEPROM info
23 * areas described in the SN1 EEPROM spec and the IPMI FRU Information
24 * Storage definition
25 */
26
27 /* Maximum lengths for EEPROM fields
28 */
29 #define EEPROM_PARTNUM_LEN 20
30 #define EEPROM_SERNUM_LEN 10
31 #define EEPROM_MANUF_NAME_LEN 10
32 #define EEPROM_PROD_NAME_LEN 14
33
34
35
36 /* The EEPROM "common header", which contains offsets to the other
37 * info areas in the EEPROM
38 */
39 typedef struct eeprom_common_hdr_t
40 {
41 uchar_t format; /* common header format byte */
42 uchar_t internal_use; /* offsets to various info areas */
43 uchar_t chassis; /* (in doubleword units) */
44 uchar_t board;
45 uchar_t product;
46 uchar_t multi_record;
47 uchar_t pad;
48 uchar_t checksum;
49 } eeprom_common_hdr_t;
50
51
52 /* The chassis (brick) info area
53 */
54 typedef struct eeprom_chassis_ia_t
55 {
56 uchar_t format; /* format byte */
57 uchar_t length; /* info area length in doublewords */
58 uchar_t type; /* chassis type (always 0x17 "rack mount") */
59 uchar_t part_num_tl; /* type/length of part number field */
60
61 char part_num[EEPROM_PARTNUM_LEN];
62 /* ASCII part number */
63
64 uchar_t serial_num_tl; /* type/length of serial number field */
65
66 char serial_num[EEPROM_SERNUM_LEN];
67 /* ASCII serial number */
68
69 uchar_t checksum;
70
71 } eeprom_chassis_ia_t;
72
73
74 /* The board info area
75 */
76 typedef struct eeprom_board_ia_t
77 {
78 uchar_t format; /* format byte */
79 uchar_t length; /* info area length in doublewords */
80 uchar_t language; /* language code, always 0x00 "English" */
81 int mfg_date; /* date & time of manufacture, in minutes
82 since 0:00 1/1/96 */
83 uchar_t manuf_tl; /* type/length of manufacturer name field */
84
85 char manuf[EEPROM_MANUF_NAME_LEN];
86 /* ASCII manufacturer name */
87
88 uchar_t product_tl; /* type/length of product name field */
89
90 char product[EEPROM_PROD_NAME_LEN];
91 /* ASCII product name */
92
93 uchar_t serial_num_tl; /* type/length of board serial number */
94
95 char serial_num[EEPROM_SERNUM_LEN];
96 /* ASCII serial number */
97
98 uchar_t part_num_tl; /* type/length of board part number */
99
100 char part_num[EEPROM_PARTNUM_LEN];
101 /* ASCII part number */
102
103 /*
104 * "custom" fields -- see SN1 EEPROM Spec
105 */
106 uchar_t board_rev_tl; /* type/length of board rev (always 0xC2) */
107
108 char board_rev[2]; /* ASCII board revision */
109
110 uchar_t eeprom_size_tl; /* type/length of eeprom size field */
111 uchar_t eeprom_size; /* size code for eeprom */
112 uchar_t temp_waiver_tl; /* type/length of temp waiver field (0xC2) */
113 char temp_waiver[2]; /* temp waiver */
114
115
116 /*
117 * these fields only appear in main boards' EEPROMs
118 */
119 uchar_t ekey_G_tl; /* type/length of encryption key "G" */
120 uint32_t ekey_G; /* encryption key "G" */
121 uchar_t ekey_P_tl; /* type/length of encryption key "P" */
122 uint32_t ekey_P; /* encryption key "P" */
123 uchar_t ekey_Y_tl; /* type/length of encryption key "Y" */
124 uint32_t ekey_Y; /* encryption key "Y" */
125
126
127 /*
128 * these fields are used for I bricks only
129 */
130 uchar_t mac_addr_tl; /* type/length of MAC address */
131 char mac_addr[12]; /* MAC address */
132 uchar_t ieee1394_cfg_tl; /* type/length of IEEE 1394 info */
133 uchar_t ieee1394_cfg[32]; /* IEEE 1394 config info */
134
135
136 /*
137 * all boards have a checksum
138 */
139 uchar_t checksum;
140
141 } eeprom_board_ia_t;
142
143 /* given a pointer to the three-byte little-endian EEPROM representation
144 * of date-of-manufacture, this function translates to a big-endian
145 * integer format
146 */
147 int eeprom_xlate_board_mfr_date( uchar_t *src );
148
149
150 /* EEPROM Serial Presence Detect record (used for DIMMs in IP35)
151 */
152 typedef struct eeprom_spd_t
153 {
154 /* 0*/ uchar_t spd_used; /* # of bytes written to serial memory by manufacturer */
155 /* 1*/ uchar_t spd_size; /* Total # of bytes of SPD memory device */
156 /* 2*/ uchar_t mem_type; /* Fundamental memory type (FPM, EDO, SDRAM..) */
157 /* 3*/ uchar_t num_rows; /* # of row addresses on this assembly */
158 /* 4*/ uchar_t num_cols; /* # Column Addresses on this assembly */
159 /* 5*/ uchar_t mod_rows; /* # Module Rows on this assembly */
160 /* 6*/ uchar_t data_width[2]; /* Data Width of this assembly (16b little-endian) */
161 /* 8*/ uchar_t volt_if; /* Voltage interface standard of this assembly */
162 /* 9*/ uchar_t cyc_time; /* SDRAM Cycle time, CL=X (highest CAS latency) */
163 /* A*/ uchar_t acc_time; /* SDRAM Access from Clock (highest CAS latency) */
164 /* B*/ uchar_t dimm_cfg; /* DIMM Configuration type (non-parity, ECC) */
165 /* C*/ uchar_t refresh_rt; /* Refresh Rate/Type */
166 /* D*/ uchar_t prim_width; /* Primary SDRAM Width */
167 /* E*/ uchar_t ec_width; /* Error Checking SDRAM width */
168 /* F*/ uchar_t min_delay; /* Min Clock Delay Back to Back Random Col Address */
169 /*10*/ uchar_t burst_len; /* Burst Lengths Supported */
170 /*11*/ uchar_t num_banks; /* # of Banks on Each SDRAM Device */
171 /*12*/ uchar_t cas_latencies; /* CAS# Latencies Supported */
172 /*13*/ uchar_t cs_latencies; /* CS# Latencies Supported */
173 /*14*/ uchar_t we_latencies; /* Write Latencies Supported */
174 /*15*/ uchar_t mod_attrib; /* SDRAM Module Attributes */
175 /*16*/ uchar_t dev_attrib; /* SDRAM Device Attributes: General */
176 /*17*/ uchar_t cyc_time2; /* Min SDRAM Cycle time at CL X-1 (2nd highest CAS latency) */
177 /*18*/ uchar_t acc_time2; /* SDRAM Access from Clock at CL X-1 (2nd highest CAS latency) */
178 /*19*/ uchar_t cyc_time3; /* Min SDRAM Cycle time at CL X-2 (3rd highest CAS latency) */
179 /*1A*/ uchar_t acc_time3; /* Max SDRAM Access from Clock at CL X-2 (3nd highest CAS latency) */
180 /*1B*/ uchar_t min_row_prechg; /* Min Row Precharge Time (Trp) */
181 /*1C*/ uchar_t min_ra_to_ra; /* Min Row Active to Row Active (Trrd) */
182 /*1D*/ uchar_t min_ras_to_cas; /* Min RAS to CAS Delay (Trcd) */
183 /*1E*/ uchar_t min_ras_pulse; /* Minimum RAS Pulse Width (Tras) */
184 /*1F*/ uchar_t row_density; /* Density of each row on module */
185 /*20*/ uchar_t ca_setup; /* Command and Address signal input setup time */
186 /*21*/ uchar_t ca_hold; /* Command and Address signal input hold time */
187 /*22*/ uchar_t d_setup; /* Data signal input setup time */
188 /*23*/ uchar_t d_hold; /* Data signal input hold time */
189
190 /*24*/ uchar_t pad0[26]; /* unused */
191
192 /*3E*/ uchar_t data_rev; /* SPD Data Revision Code */
193 /*3F*/ uchar_t checksum; /* Checksum for bytes 0-62 */
194 /*40*/ uchar_t jedec_id[8]; /* Manufacturer's JEDEC ID code */
195
196 /*48*/ uchar_t mfg_loc; /* Manufacturing Location */
197 /*49*/ uchar_t part_num[18]; /* Manufacturer's Part Number */
198
199 /*5B*/ uchar_t rev_code[2]; /* Revision Code */
200
201 /*5D*/ uchar_t mfg_date[2]; /* Manufacturing Date */
202
203 /*5F*/ uchar_t ser_num[4]; /* Assembly Serial Number */
204
205 /*63*/ uchar_t manuf_data[27]; /* Manufacturer Specific Data */
206
207 /*7E*/ uchar_t intel_freq; /* Intel specification frequency */
208 /*7F*/ uchar_t intel_100MHz; /* Intel spec details for 100MHz support */
209
210 } eeprom_spd_t;
211
212
213 #define EEPROM_SPD_RECORD_MAXLEN 256
214
215 typedef union eeprom_spd_u
216 {
217 eeprom_spd_t fields;
218 char bytes[EEPROM_SPD_RECORD_MAXLEN];
219
220 } eeprom_spd_u;
221
222
223 /* EEPROM board record
224 */
225 typedef struct eeprom_brd_record_t
226 {
227 eeprom_chassis_ia_t *chassis_ia;
228 eeprom_board_ia_t *board_ia;
229 eeprom_spd_u *spd;
230
231 } eeprom_brd_record_t;
232
233
234 /* End-of-fields marker
235 */
236 #define EEPROM_EOF 0xc1
237
238
239 /* masks for dissecting the type/length bytes
240 */
241 #define FIELD_FORMAT_MASK 0xc0
242 #define FIELD_LENGTH_MASK 0x3f
243
244
245 /* field format codes (used in type/length bytes)
246 */
247 #define FIELD_FORMAT_BINARY 0x00 /* binary format */
248 #define FIELD_FORMAT_BCD 0x40 /* BCD */
249 #define FIELD_FORMAT_PACKED 0x80 /* packed 6-bit ASCII */
250 #define FIELD_FORMAT_ASCII 0xC0 /* 8-bit ASCII */
251
252
253
254
255 /* codes specifying brick and board type
256 */
257 #define C_BRICK 0x100
258
259 #define C_PIMM (C_BRICK | 0x10)
260 #define C_PIMM_0 (C_PIMM) /* | 0x0 */
261 #define C_PIMM_1 (C_PIMM | 0x1)
262
263 #define C_DIMM (C_BRICK | 0x20)
264 #define C_DIMM_0 (C_DIMM) /* | 0x0 */
265 #define C_DIMM_1 (C_DIMM | 0x1)
266 #define C_DIMM_2 (C_DIMM | 0x2)
267 #define C_DIMM_3 (C_DIMM | 0x3)
268 #define C_DIMM_4 (C_DIMM | 0x4)
269 #define C_DIMM_5 (C_DIMM | 0x5)
270 #define C_DIMM_6 (C_DIMM | 0x6)
271 #define C_DIMM_7 (C_DIMM | 0x7)
272
273 #define R_BRICK 0x200
274 #define R_POWER (R_BRICK | 0x10)
275
276 #define VECTOR 0x300 /* used in vector ops when the destination
277 * could be a cbrick or an rbrick */
278
279 #define IO_BRICK 0x400
280 #define IO_POWER (IO_BRICK | 0x10)
281
282 #define BRICK_MASK 0xf00
283 #define SUBORD_MASK 0xf0 /* AND with component specification; if the
284 the result is non-zero, then the component
285 is a subordinate board of some kind */
286 #define COMPT_MASK 0xf /* if there's more than one instance of a
287 particular type of subordinate board, this
288 masks out which one we're talking about */
289
290
291
292 /* functions & macros for obtaining "NIC-like" strings from EEPROMs
293 */
294
295 int eeprom_str( char *nic_str, nasid_t nasid, int component );
296 int vector_eeprom_str( char *nic_str, nasid_t nasid,
297 int component, net_vec_t path );
298
299 #define CBRICK_EEPROM_STR(s,n) eeprom_str((s),(n),C_BRICK)
300 #define IOBRICK_EEPROM_STR(s,n) eeprom_str((s),(n),IO_BRICK)
301 #define RBRICK_EEPROM_STR(s,n,p) vector_eeprom_str((s),(n),R_BRICK,p)
302 #define VECTOR_EEPROM_STR(s,n,p) vector_eeprom_str((s),(n),VECTOR,p)
303
304
305
306 /* functions for obtaining formatted records from EEPROMs
307 */
308
309 int cbrick_eeprom_read( eeprom_brd_record_t *buf, nasid_t nasid,
310 int component );
311 int iobrick_eeprom_read( eeprom_brd_record_t *buf, nasid_t nasid,
312 int component );
313 int vector_eeprom_read( eeprom_brd_record_t *buf, nasid_t nasid,
314 net_vec_t path, int component );
315
316
317 /* functions providing unique id's for duplonet and i/o discovery
318 */
319
320 int cbrick_uid_get( nasid_t nasid, uint64_t *uid );
321 int rbrick_uid_get( nasid_t nasid, net_vec_t path, uint64_t *uid );
322 int iobrick_uid_get( nasid_t nasid, uint64_t *uid );
323
324
325 /* retrieve the ethernet MAC address for an I-brick
326 */
327
328 int ibrick_mac_addr_get( nasid_t nasid, char *eaddr );
329
330
331 /* error codes
332 */
333
334 #define EEP_OK 0
335 #define EEP_L1 1
336 #define EEP_FAIL 2
337 #define EEP_BAD_CHECKSUM 3
338 #define EEP_NICIFY 4
339 #define EEP_PARAM 6
340 #define EEP_NOMEM 7
341
342
343
344 /* given a hardware graph vertex and an indication of the brick type,
345 * brick and board to be read, this functions reads the eeprom and
346 * attaches a "NIC"-format string of manufacturing information to the
347 * vertex. If the vertex already has the string, just returns the
348 * string. If component is not VECTOR or R_BRICK, the path parameter
349 * is ignored.
350 */
351
352 #ifdef LATER
353 char *eeprom_vertex_info_set( int component, int nasid, devfs_handle_t v,
354 net_vec_t path );
355 #endif
356
357
358
359 /* We may need to differentiate between an XBridge and other types of
360 * bridges during discovery to tell whether the bridge in question
361 * is part of an IO brick. The following function reads the WIDGET_ID
362 * register of the bridge under examination and returns a positive value
363 * if the part and mfg numbers stored there indicate that this widget
364 * is an XBridge (and so must be part of a brick).
365 */
366 #ifdef LATER
367 int is_iobrick( int nasid, int widget_num );
368 #endif
369
370 /* the following macro derives the widget number from the register
371 * address passed to it and uses is_iobrick to determine whether
372 * the widget in question is part of an SN1 IO brick.
373 */
374 #define IS_IOBRICK(rg) is_iobrick( NASID_GET((rg)), SWIN_WIDGETNUM((rg)) )
375
376
377
378 /* macros for NIC compatability */
379 /* always invoked on "this" cbrick */
380 #define HUB_VERTEX_MFG_INFO(v) \
381 eeprom_vertex_info_set( C_BRICK, get_nasid(), (v), 0 )
382
383 #define BRIDGE_VERTEX_MFG_INFO(v, r) \
384 ( IS_IOBRICK((r)) ? eeprom_vertex_info_set \
385 ( IO_BRICK, NASID_GET((r)), (v), 0 ) \
386 : nic_bridge_vertex_info((v), (r)) )
387
388 #ifdef BRINGUP /* will we read mfg info from IOC3's that aren't
389 * part of IO7 cards, or aren't in I/O bricks? */
390 #define IOC3_VERTEX_MFG_INFO(v, r, e) \
391 eeprom_vertex_info_set( IO_IO7, NASID_GET((r)), (v), 0 )
392 #endif /* BRINGUP */
393
394 #define HUB_UID_GET(n,v,p) cbrick_uid_get((n),(p))
395 #define ROUTER_UID_GET(d,p) rbrick_uid_get(get_nasid(),(d),(p))
396 #define XBOW_UID_GET(n,p) iobrick_uid_get((n),(p))
397
398 #endif /* _ASM_SN_EEPROM_H */
399