File: /usr/src/linux/include/asm-ia64/sn/pci/pciio_private.h

1     /* $Id$
2      *
3      * This file is subject to the terms and conditions of the GNU General Public
4      * License.  See the file "COPYING" in the main directory of this archive
5      * for more details.
6      *
7      * Copyright (C) 1992 - 1997, 2000 Silicon Graphics, Inc.
8      * Copyright (C) 2000 by Colin Ngam
9      */
10     #ifndef _ASM_SN_PCI_PCIIO_PRIVATE_H
11     #define _ASM_SN_PCI_PCIIO_PRIVATE_H
12     
13     /*
14      * pciio_private.h -- private definitions for pciio
15      * PCI drivers should NOT include this file.
16      */
17     
18     #ident "sys/PCI/pciio_private: $Revision: 1.13 $"
19     
20     /*
21      * All PCI providers set up PIO using this information.
22      */
23     struct pciio_piomap_s {
24         unsigned                pp_flags;	/* PCIIO_PIOMAP flags */
25         devfs_handle_t            pp_dev;	/* associated pci card */
26         pciio_slot_t            pp_slot;	/* which slot the card is in */
27         pciio_space_t           pp_space;	/* which address space */
28         iopaddr_t               pp_pciaddr;		/* starting offset of mapping */
29         size_t                  pp_mapsz;	/* size of this mapping */
30         caddr_t                 pp_kvaddr;	/* kernel virtual address to use */
31     };
32     
33     /*
34      * All PCI providers set up DMA using this information.
35      */
36     struct pciio_dmamap_s {
37         unsigned                pd_flags;	/* PCIIO_DMAMAP flags */
38         devfs_handle_t            pd_dev;	/* associated pci card */
39         pciio_slot_t            pd_slot;	/* which slot the card is in */
40     };
41     
42     /*
43      * All PCI providers set up interrupts using this information.
44      */
45     
46     struct pciio_intr_s {
47         unsigned                pi_flags;	/* PCIIO_INTR flags */
48         devfs_handle_t            pi_dev;	/* associated pci card */
49         device_desc_t	    pi_dev_desc;	/* override device descriptor */
50         pciio_intr_line_t       pi_lines;	/* which interrupt line(s) */
51         intr_func_t             pi_func;	/* handler function (when connected) */
52         intr_arg_t              pi_arg;	/* handler parameter (when connected) */
53     #ifdef LATER
54         thd_int_t               pi_tinfo;	/* Thread info (when connected) */
55     #endif
56         cpuid_t                 pi_mustruncpu; /* Where we must run. */
57         int                     pi_irq;     /* IRQ assigned */
58         int                     pi_cpu;     /* cpu assigned */
59     };
60     
61     /* PCIIO_INTR (pi_flags) flags */
62     #define PCIIO_INTR_CONNECTED	1	/* interrupt handler/thread has been connected */
63     #define PCIIO_INTR_NOTHREAD	2	/* interrupt handler wants to be called at interrupt level */
64     
65     /*
66      * Each PCI Card has one of these.
67      */
68     
69     struct pciio_info_s {
70         char                   *c_fingerprint;
71         devfs_handle_t            c_vertex;	/* back pointer to vertex */
72         pciio_bus_t             c_bus;	/* which bus the card is in */
73         pciio_slot_t            c_slot;	/* which slot the card is in */
74         pciio_function_t        c_func;	/* which func (on multi-func cards) */
75         pciio_vendor_id_t       c_vendor;	/* PCI card "vendor" code */
76         pciio_device_id_t       c_device;	/* PCI card "device" code */
77         devfs_handle_t            c_master;	/* PCI bus provider */
78         arbitrary_info_t        c_mfast;	/* cached fastinfo from c_master */
79         pciio_provider_t       *c_pops;	/* cached provider from c_master */
80         error_handler_f        *c_efunc;	/* error handling function */
81         error_handler_arg_t     c_einfo;	/* first parameter for efunc */
82     
83         struct {				/* state of BASE regs */
84     	pciio_space_t		w_space;
85     	iopaddr_t		w_base;
86     	size_t			w_size;
87         }			    c_window[6];
88     
89         unsigned		    c_rbase;	/* EXPANSION ROM base addr */
90         unsigned		    c_rsize;	/* EXPANSION ROM size (bytes) */
91     
92         pciio_piospace_t	    c_piospace;	/* additional I/O spaces allocated */
93     };
94     
95     extern char             pciio_info_fingerprint[];
96     #endif				/* _ASM_SN_PCI_PCIIO_PRIVATE_H */
97