File: /usr/src/linux/include/asm-mips/ng1hw.h
1 /* $Id: ng1hw.h,v 1.4 1999/08/04 06:01:51 ulfc Exp $
2 *
3 * ng1hw.h: Tweaks the newport.h structures and definations to be compatible
4 * with IRIX. Quite ugly, but it works.
5 *
6 * Copyright (C) 1999 Ulf Carlsson (ulfc@thepuffingroup.com)
7 *
8 */
9
10 #ifndef _SGI_NG1HW_H
11 #define _SGI_NG1HW_H
12
13 #include <video/newport.h>
14
15 #define rex3regs newport_rexregs
16 #define configregs newport_cregs
17 #define float_long npfreg_t
18
19 typedef struct newport_rexregs Rex3regs;
20 typedef struct newport_cregs Configregs;
21 typedef union np_dcb DCB_reg;
22
23
24 /* It looks like I can't do a simple tweak with this structure because the IRIX
25 * version is just *too* stupid. Ok, here's a new version of it..
26 */
27
28 struct rex3chip {
29 struct newport_rexregs set;
30 unsigned long _unused0[0x16e];
31 struct newport_rexregs go;
32 unsigned long _unused1[0x22e];
33 struct {
34 struct newport_cregs set;
35 unsigned long _unused2[0x1ef];
36 struct newport_cregs go;
37 } p1;
38 };
39
40 typedef struct rex3chip rex3Chip;
41 typedef struct rex3chip Rex3chip;
42
43 /* Tweak the defines .. */
44
45 #define DM0_OPCODE NPORT_DMODE0_OPMASK
46 #define DM0_NOP NPORT_DMODE0_NOP
47 #define DM0_READ NPORT_DMODE0_RD
48 #define DM0_DRAW NPORT_DMODE0_DRAW
49 #define DM0_SCR2SCR NPORT_DMODE0_S2S
50
51 #define DM0_ADRMODE_SHIFT 2
52 #define DM0_ADRMODE NPORT_DMODE0_AMMASK
53 #define DM0_SPAN NPORT_DMODE0_SPAN
54 #define DM0_BLOCK NPORT_DMODE0_BLOCK
55 #define DM0_ILINE NPORT_DMODE0_ILINE
56 #define DM0_FLINE NPORT_DMODE0_FLINE
57 #define DM0_ALINE NPORT_DMODE0_ALINE
58 #define DM0_TLINE NPORT_DMODE0_TLINE
59 #define DM0_BLINE NPORT_DMODE0_BLINE
60
61 #define DM0_DOSETUP NPORT_DMODE0_DOSETUP
62 #define DM0_COLORHOST NPORT_DMODE0_CHOST
63 #define DM0_ALPHAHOST NPORT_DMODE0_AHOST
64 #define DM0_STOPONX NPORT_DMODE0_STOPX
65 #define DM0_STOPONY NPORT_DMODE0_STOPY
66 #define DM0_STOPONXY (NPORT_DMODE0_STOPX | NPORT_DMODE0_STOPY)
67 #define DM0_SKIPFIRST NPORT_DMODE0_SK1ST
68 #define DM0_SKIPLAST NPORT_DMODE0_SKLST
69 #define DM0_ENZPATTERN NPORT_DMODE0_ZPENAB
70 #define DM0_ENLSPATTERN NPORT_DMODE0_LISPENAB
71 #define DM0_LSADVLAST NPORT_DMODE0_LISLST
72 #define DM0_LENGTH32 NPORT_DMODE0_L32
73 #define DM0_ZOPAQUE NPORT_DMODE0_ZOPQ
74 #define DM0_LSOPAQUE NPORT_DMODE0_LISOPQ
75 #define DM0_SHADE NPORT_DMODE0_SHADE
76 #define DM0_LRONLY NPORT_DMODE0_LRONLY
77 #define DM0_XYOFFSET NPORT_DMODE0_XYOFF
78 #define DM0_CICLAMP NPORT_DMODE0_CLAMP
79 #define DM0_ENDPTFILTER NPORT_DMODE0_ENDPF
80 #define DM0_YSTRIDE NPORT_DMODE0_YSTR
81
82 #define DM1_PLANES_SHIFT 0
83 /* The rest of the DM1 planes defines are in newport.h */
84
85 #define DM1_DRAWDEPTH_SHIFT 3
86 #define DM1_DRAWDEPTH_MASK NPORT_DMODE1_DDMASK
87 #define DM1_DRAWDEPTH NPORT_DMODE1_DD24 /* An alias? */
88 #define DM1_DRAWDEPTH4 NPORT_DMODE1_DD4
89 #define DM1_DRAWDEPTH8 NPORT_DMODE1_DD8
90 #define DM1_DRAWDEPTH12 NPORT_DMODE1_DD12
91 #define DM1_DRAWDEPTH24 NPORT_DMODE1_DD24
92
93 #define DM1_DBLSRC NPORT_DMODE1_DSRC
94 #define DM1_YFLIP NPORT_DMODE1_YFLIP
95 #define DM1_RWPACKED NPORT_DMODE1_RWPCKD
96
97 #define DM1_HOSTDEPTH_SHIFT 8
98 #define DM1_HOSTDEPTH_MASK NPORT_DMODE1_HDMASK
99 #define DM1_HOSTDEPTH NPORT_DMODE1_HD32 /* An alias? */
100 #define DM1_HOSTDEPTH4 NPORT_DMODE1_HD4
101 #define DM1_HOSTDEPTH8 NPORT_DMODE1_HD8
102 #define DM1_HOSTDEPTH12 NPORT_DMODE1_HD12
103 #define DM1_HOSTDEPTH32 NPORT_DMODE1_HD32
104
105 #define DM1_RWDOUBLE NPORT_DMODE1_RWDBL
106 #define DM1_SWAPENDIAN NPORT_DMODE1_ESWAP
107
108 #define DM1_COLORCOMPARE_SHIFT 12
109 #define DM1_COLORCOMPARE_MASK NPORT_DMODE1_CCMASK
110 #define DM1_COLORCOMPARE NPORT_DMODE1_CCMASK
111 #define DM1_COLORCOMPLT NPORT_DMODE1_CCLT
112 #define DM1_COLORCOMPEQ NPORT_DMODE1_CCEQ
113 #define DM1_COLORCOMPGT NPORT_DMODE1_CCGT
114
115 #define DM1_RGBMODE NPORT_DMODE1_RGBMD
116 #define DM1_ENDITHER NPORT_DMODE1_DENAB
117 #define DM1_FASTCLEAR NPORT_DMODE1_FCLR
118 #define DM1_ENBLEND NPORT_DMODE1_BENAB
119
120 #define DM1_SF_SHIFT 19
121 #define DM1_SF_MASK NPORT_DMODE1_SFMASK
122 #define DM1_SF NPORT_DMODE1_SFMASK
123 #define DM1_SF_ZERO NPORT_DMODE1_SF0
124 #define DM1_SF_ONE NPORT_DMODE1_SF1
125 #define DM1_SF_DC NPORT_DMODE1_SFDC
126 #define DM1_SF_MDC NPORT_DMODE1_SFMDC
127 #define DM1_SF_SA NPORT_DMODE1_SFSA
128 #define DM1_SF_MSA NPORT_DMODE1_SFMSA
129
130 #define DM1_DF_SHIFT 22 /* dfactor(2:0) */
131 #define DM1_DF_MASK NPORT_DMODE1_DFMASK
132 #define DM1_DF NPORT_DMODE1_DFMASK
133 #define DM1_DF_ZERO NPORT_DMODE1_DF0
134 #define DM1_DF_ONE NPORT_DMODE1_DF1
135 #define DM1_DF_SC NPORT_DMODE1_DFSC
136 #define DM1_DF_MSC NPORT_DMODE1_DFMSC
137 #define DM1_DF_SA NPORT_DMODE1_DFSA
138 #define DM1_DF_MSA NPORT_DMODE1_DFMSA
139
140 #define DM1_ENBACKBLEND NPORT_DMODE1_BBENAB
141 #define DM1_ENPREFETCH NPORT_DMODE1_PFENAB
142 #define DM1_BLENDALPHA NPORT_DMODE1_ABLEND
143
144 #define DM1_LO_SHIFT 28
145 #define DM1_LO NPORT_DMODE1_LOMASK
146 #define DM1_LO_MASK NPORT_DMODE1_LOMASK
147 #define DM1_LO_ZERO NPORT_DMODE1_LOZERO
148 #define DM1_LO_AND NPORT_DMODE1_LOAND
149 #define DM1_LO_ANDR NPORT_DMODE1_LOANDR
150 #define DM1_LO_SRC NPORT_DMODE1_LOSRC
151 #define DM1_LO_ANDI NPORT_DMODE1_LOANDI
152 #define DM1_LO_DST NPORT_DMODE1_LODST
153 #define DM1_LO_XOR NPORT_DMODE1_LOXOR
154 #define DM1_LO_OR NPORT_DMODE1_LOOR
155 #define DM1_LO_NOR NPORT_DMODE1_LONOR
156 #define DM1_LO_XNOR NPORT_DMODE1_LOXNOR
157 #define DM1_LO_NDST NPORT_DMODE1_LONDST
158 #define DM1_LO_ORR NPORT_DMODE1_LOORR
159 #define DM1_LO_NSRC NPORT_DMODE1_LONSRC
160 #define DM1_LO_ORI NPORT_DMODE1_LOORI
161 #define DM1_LO_NAND NPORT_DMODE1_LONAND
162 #define DM1_LO_ONE NPORT_DMODE1_LOONE
163
164 #define SMASK0 NPORT_CMODE_SM0
165 #define SMASK1 NPORT_CMODE_SM1
166 #define SMASK2 NPORT_CMODE_SM2
167 #define SMASK3 NPORT_CMODE_SM3
168 #define SMASK4 NPORT_CMODE_SM4
169 #define ALL_SMASKS 0x1f
170
171 #define CM_CIDMATCH_SHIFT 9
172 #define CM_CIDMATCH_MASK NPORT_CMODE_CMSK
173
174 #define REX3VERSION_MASK NPORT_STAT_VERS
175 #define GFXBUSY NPORT_STAT_GBUSY
176 #define BACKBUSY NPORT_STAT_BBUSY
177 #define VRINT NPORT_STAT_VRINT
178 #define VIDEOINT NPORT_STAT_VIDINT
179 #define GFIFO_LEVEL_SHIFT 7
180 #define GFIFO_LEVEL_MASK NPORT_STAT_GLMSK
181 #define BFIFO_LEVEL_SHIFT 13
182 #define BFIFO_LEVEL_MASK NPORT_STAT_BLMSK
183 #define BFIFO_INT NPORT_STAT_BFIRQ
184 #define GFIFO_INT NPORT_STAT_GFIRQ
185
186 #define GIO32MODE NPORT_CFG_G32MD
187 #define BUSWIDTH NPORT_CFG_BWIDTH
188 #define EXTREGXCVR NPORT_CFG_ERCVR
189 #define BFIFODEPTH_SHIFT 3
190 #define BFIFODEPTH_MASK NPORT_CFG_BDMSK
191 #define BFIFOABOVEINT NPORT_CFG_BFAINT
192 #define GFIFODEPTH_SHIFT 8
193 #define GFIFODEPTH_MASK NPORT_CFG_GDMSK
194 #define GFIFOABOVEINT NPORT_CFG_GFAINT
195 #define TIMEOUT_SHIFT 14
196 #define TIMEOUT_MASK NPORT_CFG_TOMSK
197 #define VREFRESH_SHIFT 17
198 #define VREFRESH_MASK NPORT_CFG_VRMSK
199 #define FB_TYPE NPORT_CFG_FBTYP
200
201 #define DCB_DATAWIDTH_MASK (0x3)
202
203 #define DCB_CRS_MASK (0x7 << DCB_CRS_SHIFT)
204 #define DCB_ADDR_MASK (0xf << DCB_ADDR_SHIFT)
205 #define DCB_CSWIDTH_MASK (0x1f << DCB_CSWIDTH_SHIFT)
206 #define DCB_CSHOLD_MASK (0x1f << DCB_CSHOLD_SHIFT)
207 #define DCB_CSSETUP_MASK (0x1f << DCB_CSSETUP_SHIFT)
208
209 #define DCB_SWAPENDIAN (1 << 28)
210
211 #define REX3WAIT(rex3) while ((rex3)->p1.set.status & GFXBUSY)
212 #define BFIFOWAIT(rex3) while ((rex3)->p1.set.status & BACKBUSY)
213
214 #define REX3_GIO_ADDR_0 0x1f0f0000
215 #define REX3_GIO_ADDR_1 0x1f4f0000
216 #define REX3_GIO_ADDR_2 0x1f8f0000
217 #define REX3_GIO_ADDR_3 0x1fcf0000
218
219 #define NG1_XSIZE 1280
220 #define NG1_YSIZE 1024
221
222 #endif
223