File: /usr/src/linux/include/asm-parisc/atomic.h
1 #ifndef _ASM_PARISC_ATOMIC_H_
2 #define _ASM_PARISC_ATOMIC_H_
3
4 #include <linux/config.h>
5 #include <asm/system.h>
6
7 /* Copyright (C) 2000 Philipp Rumpf <prumpf@tux.org>. */
8
9 /*
10 * Atomic operations that C can't guarantee us. Useful for
11 * resource counting etc..
12 *
13 * And probably incredibly slow on parisc. OTOH, we don't
14 * have to write any serious assembly. prumpf
15 */
16
17 #ifdef CONFIG_SMP
18 /* we have an array of spinlocks for our atomic_ts, and a hash function
19 * to get the right index */
20 # define ATOMIC_HASH_SIZE 1
21 # define ATOMIC_HASH(a) (&__atomic_hash[0])
22
23 extern spinlock_t __atomic_hash[ATOMIC_HASH_SIZE];
24 /* copied from <asm/spinlock.h> and modified */
25 # define SPIN_LOCK(x) \
26 do { while(__ldcw(&(x)->lock) == 0); } while(0)
27
28 # define SPIN_UNLOCK(x) \
29 do { (x)->lock = 1; } while(0)
30 #else
31 # define ATOMIC_HASH_SIZE 1
32 # define ATOMIC_HASH(a) (0)
33
34 /* copied from <linux/spinlock.h> and modified */
35 # define SPIN_LOCK(x) (void)(x)
36
37 # define SPIN_UNLOCK(x) do { } while(0)
38 #endif
39
40 /* copied from <linux/spinlock.h> and modified */
41 #define SPIN_LOCK_IRQSAVE(lock, flags) do { local_irq_save(flags); SPIN_LOCK(lock); } while (0)
42 #define SPIN_UNLOCK_IRQRESTORE(lock, flags) do { SPIN_UNLOCK(lock); local_irq_restore(flags); } while (0)
43
44 /* Note that we need not lock read accesses - aligned word writes/reads
45 * are atomic, so a reader never sees unconsistent values.
46 *
47 * Cache-line alignment would conflict with, for example, linux/module.h */
48
49 typedef struct {
50 volatile int counter;
51 } atomic_t;
52
53 /* It's possible to reduce all atomic operations to either
54 * __atomic_add_return, __atomic_set and __atomic_ret (the latter
55 * is there only for consistency). */
56
57 static __inline__ int __atomic_add_return(int i, atomic_t *v)
58 {
59 int ret;
60 unsigned long flags;
61 SPIN_LOCK_IRQSAVE(ATOMIC_HASH(v), flags);
62
63 ret = (v->counter += i);
64
65 SPIN_UNLOCK_IRQRESTORE(ATOMIC_HASH(v), flags);
66 return ret;
67 }
68
69 static __inline__ void __atomic_set(atomic_t *v, int i)
70 {
71 unsigned long flags;
72 SPIN_LOCK_IRQSAVE(ATOMIC_HASH(v), flags);
73
74 v->counter = i;
75
76 SPIN_UNLOCK_IRQRESTORE(ATOMIC_HASH(v), flags);
77 }
78
79 static __inline__ int __atomic_read(atomic_t *v)
80 {
81 return v->counter;
82 }
83
84 /* exported interface */
85
86 #define atomic_add(i,v) ((void)(__atomic_add_return( (i),(v))))
87 #define atomic_sub(i,v) ((void)(__atomic_add_return(-(i),(v))))
88 #define atomic_inc(v) ((void)(__atomic_add_return( 1,(v))))
89 #define atomic_dec(v) ((void)(__atomic_add_return( -1,(v))))
90
91 #define atomic_add_return(i,v) (__atomic_add_return( (i),(v)))
92 #define atomic_sub_return(i,v) (__atomic_add_return(-(i),(v)))
93 #define atomic_inc_return(v) (__atomic_add_return( 1,(v)))
94 #define atomic_dec_return(v) (__atomic_add_return( -1,(v)))
95
96 #define atomic_dec_and_test(v) (atomic_dec_return(v) == 0)
97
98 #define atomic_set(v,i) (__atomic_set((v),i))
99 #define atomic_read(v) (__atomic_read(v))
100
101 #define ATOMIC_INIT(i) { (i) }
102
103 #endif
104