File: /usr/src/linux/arch/m68k/apollo/config.c
1 #include <linux/config.h>
2 #include <linux/types.h>
3 #include <linux/kernel.h>
4 #include <linux/mm.h>
5 #include <linux/tty.h>
6 #include <linux/console.h>
7
8 #include <asm/setup.h>
9 #include <asm/bootinfo.h>
10 #include <asm/system.h>
11 #include <asm/pgtable.h>
12 #include <asm/apollohw.h>
13 #include <asm/irq.h>
14 #include <asm/rtc.h>
15 #include <asm/machdep.h>
16
17 u_long sio01_physaddr;
18 u_long sio23_physaddr;
19 u_long rtc_physaddr;
20 u_long pica_physaddr;
21 u_long picb_physaddr;
22 u_long cpuctrl_physaddr;
23 u_long timer_physaddr;
24 u_long apollo_model;
25
26 extern void dn_sched_init(void (*handler)(int,void *,struct pt_regs *));
27 extern int dn_keyb_init(void);
28 extern int dn_dummy_kbdrate(struct kbd_repeat *);
29 extern void dn_init_IRQ(void);
30 extern int dn_request_irq(unsigned int irq, void (*handler)(int, void *, struct pt_regs *), unsigned long flags, const char *devname, void *dev_id);
31 extern void dn_free_irq(unsigned int irq, void *dev_id);
32 extern void dn_enable_irq(unsigned int);
33 extern void dn_disable_irq(unsigned int);
34 extern int dn_get_irq_list(char *);
35 extern unsigned long dn_gettimeoffset(void);
36 extern void dn_gettod(int *, int *, int *, int *, int *, int *);
37 extern int dn_dummy_hwclk(int, struct hwclk_time *);
38 extern int dn_dummy_set_clock_mmss(unsigned long);
39 extern void dn_mksound(unsigned int count, unsigned int ticks);
40 extern void dn_dummy_reset(void);
41 extern void dn_dummy_waitbut(void);
42 extern struct fb_info *dn_fb_init(long *);
43 extern void dn_dummy_debug_init(void);
44 extern void (*kd_mksound)(unsigned int, unsigned int);
45 extern void dn_dummy_video_setup(char *,int *);
46 extern void dn_process_int(int irq, struct pt_regs *fp);
47 #ifdef CONFIG_HEARTBEAT
48 static void dn_heartbeat(int on);
49 #endif
50 static void dn_timer_int(int irq,void *, struct pt_regs *);
51 static void (*sched_timer_handler)(int, void *, struct pt_regs *)=NULL;
52 static void dn_get_model(char *model);
53 static int dn_cpuctrl=0xff00;
54 static const char *apollo_models[] = {
55 "DN3000 (Otter)",
56 "DN3010 (Otter)",
57 "DN3500 (Cougar II)",
58 "DN4000 (Mink)",
59 "DN4500 (Roadrunner)" };
60
61 int apollo_parse_bootinfo(const struct bi_record *record) {
62
63 int unknown = 0;
64 const unsigned long *data = record->data;
65
66 switch(record->tag) {
67 case BI_APOLLO_MODEL:
68 apollo_model=*data;
69 break;
70
71 default:
72 unknown=1;
73 }
74
75 return unknown;
76 }
77
78 void dn_setup_model(void) {
79
80
81 printk("Apollo hardware found: ");
82 printk("[%s]\n", apollo_models[apollo_model - APOLLO_DN3000]);
83
84 switch(apollo_model) {
85 case APOLLO_UNKNOWN:
86 panic("Unknown apollo model");
87 break;
88 case APOLLO_DN3000:
89 case APOLLO_DN3010:
90 sio01_physaddr=SAU8_SIO01_PHYSADDR;
91 rtc_physaddr=SAU8_RTC_PHYSADDR;
92 pica_physaddr=SAU8_PICA;
93 picb_physaddr=SAU8_PICB;
94 cpuctrl_physaddr=SAU8_CPUCTRL;
95 timer_physaddr=SAU8_TIMER;
96 break;
97 case APOLLO_DN4000:
98 sio01_physaddr=SAU7_SIO01_PHYSADDR;
99 sio23_physaddr=SAU7_SIO23_PHYSADDR;
100 rtc_physaddr=SAU7_RTC_PHYSADDR;
101 pica_physaddr=SAU7_PICA;
102 picb_physaddr=SAU7_PICB;
103 cpuctrl_physaddr=SAU7_CPUCTRL;
104 timer_physaddr=SAU7_TIMER;
105 break;
106 case APOLLO_DN4500:
107 panic("Apollo model not yet supported");
108 break;
109 case APOLLO_DN3500:
110 sio01_physaddr=SAU7_SIO01_PHYSADDR;
111 sio23_physaddr=SAU7_SIO23_PHYSADDR;
112 rtc_physaddr=SAU7_RTC_PHYSADDR;
113 pica_physaddr=SAU7_PICA;
114 picb_physaddr=SAU7_PICB;
115 cpuctrl_physaddr=SAU7_CPUCTRL;
116 timer_physaddr=SAU7_TIMER;
117 break;
118 default:
119 panic("Undefined apollo model");
120 break;
121 }
122
123
124 }
125
126 int dn_serial_console_wait_key(struct console *co) {
127
128 while(!(sio01.srb_csrb & 1))
129 barrier();
130 return sio01.rhrb_thrb;
131 }
132
133 void dn_serial_console_write (struct console *co, const char *str,unsigned int count)
134 {
135 while(count--) {
136 if (*str == '\n') {
137 sio01.rhrb_thrb = (unsigned char)'\r';
138 while (!(sio01.srb_csrb & 0x4))
139 ;
140 }
141 sio01.rhrb_thrb = (unsigned char)*str++;
142 while (!(sio01.srb_csrb & 0x4))
143 ;
144 }
145 }
146
147 void dn_serial_print (const char *str)
148 {
149 while (*str) {
150 if (*str == '\n') {
151 sio01.rhrb_thrb = (unsigned char)'\r';
152 while (!(sio01.srb_csrb & 0x4))
153 ;
154 }
155 sio01.rhrb_thrb = (unsigned char)*str++;
156 while (!(sio01.srb_csrb & 0x4))
157 ;
158 }
159 }
160
161 void config_apollo(void) {
162
163 int i;
164
165 dn_setup_model();
166
167 mach_sched_init=dn_sched_init; /* */
168 mach_keyb_init=dn_keyb_init;
169 mach_kbdrate=dn_dummy_kbdrate;
170 mach_init_IRQ=dn_init_IRQ;
171 mach_default_handler=NULL;
172 mach_request_irq = dn_request_irq;
173 mach_free_irq = dn_free_irq;
174 enable_irq = dn_enable_irq;
175 disable_irq = dn_disable_irq;
176 mach_get_irq_list = dn_get_irq_list;
177 mach_gettimeoffset = dn_gettimeoffset;
178 mach_gettod = dn_gettod; /* */
179 mach_max_dma_address = 0xffffffff;
180 mach_hwclk = dn_dummy_hwclk; /* */
181 mach_set_clock_mmss = dn_dummy_set_clock_mmss; /* */
182 mach_process_int = dn_process_int;
183 #ifdef CONFIG_BLK_DEV_FD
184 mach_floppy_init = dn_dummy_floppy_init;
185 mach_floppy_setup = dn_dummy_floppy_setup;
186 #endif
187 mach_reset = dn_dummy_reset; /* */
188 #ifdef CONFIG_DUMMY_CONSOLE
189 conswitchp = &dummy_con;
190 #endif
191 kd_mksound = dn_mksound;
192 #ifdef CONFIG_HEARTBEAT
193 mach_heartbeat = dn_heartbeat;
194 #endif
195 mach_get_model = dn_get_model;
196
197 cpuctrl=0xaa00;
198
199 /* clear DMA translation table */
200 for(i=0;i<0x400;i++)
201 addr_xlat_map[i]=0;
202
203 }
204
205 void dn_timer_int(int irq, void *dev_id, struct pt_regs *fp) {
206
207 volatile unsigned char x;
208
209 sched_timer_handler(irq,dev_id,fp);
210
211 x=*(volatile unsigned char *)(timer+3);
212 x=*(volatile unsigned char *)(timer+5);
213
214 }
215
216 void dn_sched_init(void (*timer_routine)(int, void *, struct pt_regs *)) {
217
218 /* program timer 1 */
219 *(volatile unsigned char *)(timer+3)=0x01;
220 *(volatile unsigned char *)(timer+1)=0x40;
221 *(volatile unsigned char *)(timer+5)=0x09;
222 *(volatile unsigned char *)(timer+7)=0xc4;
223
224 /* enable IRQ of PIC B */
225 *(volatile unsigned char *)(pica+1)&=(~8);
226
227 #if 0
228 printk("*(0x10803) %02x\n",*(volatile unsigned char *)(timer+0x3));
229 printk("*(0x10803) %02x\n",*(volatile unsigned char *)(timer+0x3));
230 #endif
231
232 sched_timer_handler=timer_routine;
233 request_irq(0,dn_timer_int,0,NULL,NULL);
234
235 }
236
237 unsigned long dn_gettimeoffset(void) {
238
239 return 0xdeadbeef;
240
241 }
242
243 void dn_gettod(int *yearp, int *monp, int *dayp,
244 int *hourp, int *minp, int *secp) {
245
246 *yearp=rtc->year;
247 *monp=rtc->month;
248 *dayp=rtc->day_of_month;
249 *hourp=rtc->hours;
250 *minp=rtc->minute;
251 *secp=rtc->second;
252
253 printk("gettod: %d %d %d %d %d %d\n",*yearp,*monp,*dayp,*hourp,*minp,*secp);
254
255 }
256
257 int dn_dummy_hwclk(int op, struct hwclk_time *t) {
258
259
260 if(!op) { /* read */
261 t->sec=rtc->second;
262 t->min=rtc->minute;
263 t->hour=rtc->hours;
264 t->day=rtc->day_of_month;
265 t->wday=rtc->day_of_week;
266 t->mon=rtc->month;
267 t->year=rtc->year;
268 } else {
269 rtc->second=t->sec;
270 rtc->minute=t->min;
271 rtc->hours=t->hour;
272 rtc->day_of_month=t->day;
273 if(t->wday!=-1)
274 rtc->day_of_week=t->wday;
275 rtc->month=t->mon;
276 rtc->year=t->year;
277 }
278
279 return 0;
280
281 }
282
283 int dn_dummy_set_clock_mmss(unsigned long nowtime) {
284
285 printk("set_clock_mmss\n");
286
287 return 0;
288
289 }
290
291 void dn_dummy_reset(void) {
292
293 dn_serial_print("The end !\n");
294
295 for(;;);
296
297 }
298
299 void dn_dummy_waitbut(void) {
300
301 dn_serial_print("waitbut\n");
302
303 }
304
305 static void dn_get_model(char *model)
306 {
307 strcpy(model, "Apollo ");
308 if (apollo_model >= APOLLO_DN3000 && apollo_model <= APOLLO_DN4500)
309 strcat(model, apollo_models[apollo_model - APOLLO_DN3000]);
310 }
311
312 #ifdef CONFIG_HEARTBEAT
313 static void dn_heartbeat(int on) {
314
315 if(on) {
316 dn_cpuctrl&=~0x100;
317 cpuctrl=dn_cpuctrl;
318 }
319 else {
320 dn_cpuctrl&=~0x100;
321 dn_cpuctrl|=0x100;
322 cpuctrl=dn_cpuctrl;
323 }
324 }
325 #endif
326
327