File: /usr/src/linux/include/asm-m68k/q40_master.h

1     /* 
2      * Q40 master Chip Control 
3      * RTC stuff merged for compactnes..
4     */
5     
6     #ifndef _Q40_MASTER_H
7     #define _Q40_MASTER_H
8     
9     #include <asm/raw_io.h>
10     
11     
12     #define q40_master_addr 0xff000000
13     #define q40_rtc_addr    0xff021ffc
14     
15     #define IIRQ_REG            0x0       /* internal IRQ reg */
16     #define EIRQ_REG            0x4       /* external ... */
17     #define KEYCODE_REG         0x1c      /* value of received scancode  */
18     #define DISPLAY_CONTROL_REG 0x18
19     #define FRAME_CLEAR_REG     0x24
20     #define LED_REG             0x30
21     
22     #define Q40_LED_ON()        master_outb(1,LED_REG)
23     #define Q40_LED_OFF()       master_outb(0,LED_REG)
24     
25     #define INTERRUPT_REG       IIRQ_REG  /* "native" ints */
26     #define KEY_IRQ_ENABLE_REG  0x08      /**/
27     #define KEYBOARD_UNLOCK_REG 0x20      /* clear kb int */
28     
29     #define SAMPLE_ENABLE_REG   0x14      /* generate SAMPLE ints */
30     #define SAMPLE_RATE_REG     0x2c
31     #define SAMPLE_CLEAR_REG    0x28
32     #define SAMPLE_LOW          0x00
33     #define SAMPLE_HIGH         0x01
34     
35     #define FRAME_RATE_REG       0x38      /* generate FRAME ints at 200 HZ rate */
36     
37     #if 0
38     #define SER_ENABLE_REG      0x0c      /* allow serial ints to be generated */
39     #endif
40     #define EXT_ENABLE_REG      0x10      /* ... rest of the ISA ints ... */
41     
42     
43     #define master_inb(_reg_)      in_8((unsigned char *)q40_master_addr+_reg_)
44     #define master_outb(_b_,_reg_)  out_8((unsigned char *)q40_master_addr+_reg_,_b_)
45     
46     
47     /* define some Q40 specific ints */
48     #include "q40ints.h"
49     
50     /* RTC defines */
51     
52     #define Q40_RTC_BASE (q40_rtc_addr)
53     
54     #define RTC_YEAR        (*(unsigned char *)(Q40_RTC_BASE+0))
55     #define RTC_MNTH        (*(unsigned char *)(Q40_RTC_BASE-4))
56     #define RTC_DATE        (*(unsigned char *)(Q40_RTC_BASE-8))
57     #define RTC_DOW         (*(unsigned char *)(Q40_RTC_BASE-12))
58     #define RTC_HOUR        (*(unsigned char *)(Q40_RTC_BASE-16))
59     #define RTC_MINS        (*(unsigned char *)(Q40_RTC_BASE-20))
60     #define RTC_SECS        (*(unsigned char *)(Q40_RTC_BASE-24))
61     #define RTC_CTRL        (*(unsigned char *)(Q40_RTC_BASE-28))
62     
63     
64     /* some control bits */
65     #define RTC_READ   64  /* prepare for reading */
66     #define RTC_WRITE  128
67     
68     
69     /* misc defs */
70     #define DAC_LEFT  ((unsigned char *)0xff008000)
71     #define DAC_RIGHT ((unsigned char *)0xff008004)
72     
73     #endif /* _Q40_MASTER_H */
74