File: /usr/src/linux/include/asm-mips/dec/interrupts.h

1     /*  
2      * Miscellaneous definitions used to initialise the interrupt vector table
3      * with the machine-specific interrupt routines.
4      *
5      * This file is subject to the terms and conditions of the GNU General Public
6      * License.  See the file "COPYING" in the main directory of this archive
7      * for more details.
8      *
9      * Copyright (C) 1997 by Paul M. Antoine.
10      * reworked 1998 by Harald Koerfgen.
11      */
12     
13     #ifndef __ASM_DEC_INTERRUPTS_H 
14     #define __ASM_DEC_INTERRUPTS_H 
15     
16     /*
17      * DECstation Interrupts
18      */
19     
20     /*
21      * This list reflects the priority of the Interrupts.
22      * Exception: on kmins we have to handle Memory Error 
23      * Interrupts before the TC Interrupts.
24      */
25     #define CLOCK 	0
26     #define SCSI_DMA_INT 	1
27     #define SCSI_INT	2
28     #define ETHER		3
29     #define SERIAL		4
30     #define TC0		5
31     #define TC1		6
32     #define TC2		7
33     #define MEMORY		8
34     #define FPU		9
35     #define HALT		10
36     
37     #define NR_INTS	11
38     
39     #ifndef __ASSEMBLY__
40     /*
41      * Data structure to hide the differences between the DECstation Interrupts
42      *
43      * If asic_mask == NULL, the interrupt is directly handled by the CPU.
44      * Otherwise this Interrupt is handled the IRQ Controller.
45      */
46     
47     typedef struct
48     {
49     	unsigned int	cpu_mask;	/* checking and enabling interrupts in CP0	*/
50     	unsigned int	iemask;		/* enabling interrupts in IRQ Controller	*/
51     } decint_t;
52     
53     extern volatile unsigned int *isr;
54     				/* address of the interrupt status register  */
55     extern volatile unsigned int *imr;
56     				/* address of the interrupt mask register    */
57     extern decint_t dec_interrupt[NR_INTS];
58     
59     /*
60      * Interrupt table structure to hide differences between different
61      * systems such.
62      */
63     extern void *cpu_ivec_tbl[8];
64     extern long cpu_mask_tbl[8];
65     extern long cpu_irq_nr[8];
66     extern long asic_irq_nr[32];
67     extern long asic_mask_tbl[32];
68     
69     /*
70      * Common interrupt routine prototypes for all DECStations
71      */
72     extern void	dec_intr_unimplemented(void);
73     extern void	dec_intr_fpu(void);
74     extern void	dec_intr_rtc(void);
75     
76     extern void	kn02_io_int(void);
77     extern void	kn02xa_io_int(void);
78     extern void	kn03_io_int(void);
79     
80     extern void	asic_intr_unimplemented(void);
81     
82     #endif
83     #endif 
84     
85