File: /usr/src/linux/include/asm-mips/jazz.h
1 /* $Id: jazz.h,v 1.9 1998/09/19 19:19:37 ralf Exp $
2 *
3 * This file is subject to the terms and conditions of the GNU General Public
4 * License. See the file "COPYING" in the main directory of this archive
5 * for more details.
6 *
7 * Copyright (C) 1995 - 1998 by Andreas Busse and Ralf Baechle
8 */
9 #ifndef __ASM_MIPS_JAZZ_H
10 #define __ASM_MIPS_JAZZ_H
11
12 /*
13 * The addresses below are virtual address. The mappings are
14 * created on startup via wired entries in the tlb. The Mips
15 * Magnum R3000 and R4000 machines are similar in many aspects,
16 * but many hardware register are accessible at 0xb9000000 in
17 * instead of 0xe0000000.
18 */
19
20 #define JAZZ_LOCAL_IO_SPACE 0xe0000000
21
22 /*
23 * Revision numbers in PICA_ASIC_REVISION
24 *
25 * 0xf0000000 - Rev1
26 * 0xf0000001 - Rev2
27 * 0xf0000002 - Rev3
28 */
29 #define PICA_ASIC_REVISION 0xe0000008
30
31 /*
32 * The segments of the seven segment LED are mapped
33 * to the control bits as follows:
34 *
35 * (7)
36 * ---------
37 * | |
38 * (2) | | (6)
39 * | (1) |
40 * ---------
41 * | |
42 * (3) | | (5)
43 * | (4) |
44 * --------- . (0)
45 */
46 #define PICA_LED 0xe000f000
47
48 /*
49 * Some characters for the LED control registers
50 * The original Mips machines seem to have a LED display
51 * with integrated decoder while the Acer machines can
52 * control each of the seven segments and the dot independently.
53 * It's only a toy, anyway...
54 */
55 #define LED_DOT 0x01
56 #define LED_SPACE 0x00
57 #define LED_0 0xfc
58 #define LED_1 0x60
59 #define LED_2 0xda
60 #define LED_3 0xf2
61 #define LED_4 0x66
62 #define LED_5 0xb6
63 #define LED_6 0xbe
64 #define LED_7 0xe0
65 #define LED_8 0xfe
66 #define LED_9 0xf6
67 #define LED_A 0xee
68 #define LED_b 0x3e
69 #define LED_C 0x9c
70 #define LED_d 0x7a
71 #define LED_E 0x9e
72 #define LED_F 0x8e
73
74 #ifndef _LANGUAGE_ASSEMBLY
75
76 extern __inline__ void pica_set_led(unsigned int bits)
77 {
78 volatile unsigned int *led_register = (unsigned int *) PICA_LED;
79
80 *led_register = bits;
81 }
82
83 #endif
84
85 /*
86 * Base address of the Sonic Ethernet adapter in Jazz machines.
87 */
88 #define JAZZ_ETHERNET_BASE 0xe0001000
89
90 /*
91 * Base address of the 53C94 SCSI hostadapter in Jazz machines.
92 */
93 #define JAZZ_SCSI_BASE 0xe0002000
94
95 /*
96 * i8042 keyboard controller for JAZZ and PICA chipsets.
97 * This address is just a guess and seems to differ from
98 * other mips machines such as RC3xxx...
99 */
100 #define JAZZ_KEYBOARD_ADDRESS 0xe0005000
101 #define JAZZ_KEYBOARD_DATA 0xe0005000
102 #define JAZZ_KEYBOARD_COMMAND 0xe0005001
103
104 #ifndef _LANGUAGE_ASSEMBLY
105
106 typedef struct {
107 unsigned char data;
108 unsigned char command;
109 } jazz_keyboard_hardware;
110
111 typedef struct {
112 unsigned char pad0[3];
113 unsigned char data;
114 unsigned char pad1[3];
115 unsigned char command;
116 } mips_keyboard_hardware;
117
118 /*
119 * For now. Needs to be changed for RC3xxx support. See below.
120 */
121 #define keyboard_hardware jazz_keyboard_hardware
122
123 #endif
124
125 /*
126 * i8042 keyboard controller for most other Mips machines.
127 */
128 #define MIPS_KEYBOARD_ADDRESS 0xb9005000
129 #define MIPS_KEYBOARD_DATA 0xb9005003
130 #define MIPS_KEYBOARD_COMMAND 0xb9005007
131
132 /*
133 * Serial and parallel ports (WD 16C552) on the Mips JAZZ
134 */
135 #define JAZZ_SERIAL1_BASE (unsigned int)0xe0006000
136 #define JAZZ_SERIAL2_BASE (unsigned int)0xe0007000
137 #define JAZZ_PARALLEL_BASE (unsigned int)0xe0008000
138
139 /*
140 * Dummy Device Address. Used in jazzdma.c
141 */
142 #define JAZZ_DUMMY_DEVICE 0xe000d000
143
144 /*
145 * JAZZ timer registers and interrupt no.
146 * Note that the hardware timer interrupt is actually on
147 * cpu level 6, but to keep compatibility with PC stuff
148 * it is remapped to vector 0. See arch/mips/kernel/entry.S.
149 */
150 #define JAZZ_TIMER_INTERVAL 0xe0000228
151 #define JAZZ_TIMER_REGISTER 0xe0000230
152
153 /*
154 * DRAM configuration register
155 */
156 #ifndef _LANGUAGE_ASSEMBLY
157 #ifdef __MIPSEL__
158 typedef struct {
159 unsigned int bank2 : 3;
160 unsigned int bank1 : 3;
161 unsigned int mem_bus_width : 1;
162 unsigned int reserved2 : 1;
163 unsigned int page_mode : 1;
164 unsigned int reserved1 : 23;
165 } dram_configuration;
166 #else /* defined (__MIPSEB__) */
167 typedef struct {
168 unsigned int reserved1 : 23;
169 unsigned int page_mode : 1;
170 unsigned int reserved2 : 1;
171 unsigned int mem_bus_width : 1;
172 unsigned int bank1 : 3;
173 unsigned int bank2 : 3;
174 } dram_configuration;
175 #endif
176 #endif /* _LANGUAGE_ASSEMBLY */
177
178 #define PICA_DRAM_CONFIG 0xe00fffe0
179
180 /*
181 * JAZZ interrupt control registers
182 */
183 #define JAZZ_IO_IRQ_SOURCE 0xe0010000
184 #define JAZZ_IO_IRQ_ENABLE 0xe0010002
185
186 /*
187 * JAZZ interrupt enable bits
188 */
189 #define JAZZ_IE_PARALLEL (1 << 0)
190 #define JAZZ_IE_FLOPPY (1 << 1)
191 #define JAZZ_IE_SOUND (1 << 2)
192 #define JAZZ_IE_VIDEO (1 << 3)
193 #define JAZZ_IE_ETHERNET (1 << 4)
194 #define JAZZ_IE_SCSI (1 << 5)
195 #define JAZZ_IE_KEYBOARD (1 << 6)
196 #define JAZZ_IE_MOUSE (1 << 7)
197 #define JAZZ_IE_SERIAL1 (1 << 8)
198 #define JAZZ_IE_SERIAL2 (1 << 9)
199
200 /*
201 * JAZZ Interrupt Level definitions
202 *
203 * This is somewhat broken. For reasons which nobody can remember anymore
204 * we remap the Jazz interrupts to the usual ISA style interrupt numbers.
205 */
206 #define JAZZ_PARALLEL_IRQ 16
207 #define JAZZ_FLOPPY_IRQ 6 /* needs to be consistent with floppy driver! */
208 #define JAZZ_SOUND_IRQ 18
209 #define JAZZ_VIDEO_IRQ 19
210 #define JAZZ_ETHERNET_IRQ 20
211 #define JAZZ_SCSI_IRQ 21
212 #define JAZZ_KEYBOARD_IRQ 22
213 #define JAZZ_MOUSE_IRQ 23
214 #define JAZZ_SERIAL1_IRQ 24
215 #define JAZZ_SERIAL2_IRQ 25
216
217 #define JAZZ_TIMER_IRQ 31
218
219
220 /*
221 * JAZZ DMA Channels
222 * Note: Channels 4...7 are not used with respect to the Acer PICA-61
223 * chipset which does not provide these DMA channels.
224 */
225 #define JAZZ_SCSI_DMA 0 /* SCSI */
226 #define JAZZ_FLOPPY_DMA 1 /* FLOPPY */
227 #define JAZZ_AUDIOL_DMA 2 /* AUDIO L */
228 #define JAZZ_AUDIOR_DMA 3 /* AUDIO R */
229
230 /*
231 * JAZZ R4030 MCT_ADR chip (DMA controller)
232 * Note: Virtual Addresses !
233 */
234 #define JAZZ_R4030_CONFIG 0xE0000000 /* R4030 config register */
235 #define JAZZ_R4030_REVISION 0xE0000008 /* same as PICA_ASIC_REVISION */
236 #define JAZZ_R4030_INV_ADDR 0xE0000010 /* Invalid Address register */
237
238 #define JAZZ_R4030_TRSTBL_BASE 0xE0000018 /* Translation Table Base */
239 #define JAZZ_R4030_TRSTBL_LIM 0xE0000020 /* Translation Table Limit */
240 #define JAZZ_R4030_TRSTBL_INV 0xE0000028 /* Translation Table Invalidate */
241
242 #define JAZZ_R4030_CACHE_MTNC 0xE0000030 /* Cache Maintenance */
243 #define JAZZ_R4030_R_FAIL_ADDR 0xE0000038 /* Remote Failed Address */
244 #define JAZZ_R4030_M_FAIL_ADDR 0xE0000040 /* Memory Failed Address */
245
246 #define JAZZ_R4030_CACHE_PTAG 0xE0000048 /* I/O Cache Physical Tag */
247 #define JAZZ_R4030_CACHE_LTAG 0xE0000050 /* I/O Cache Logical Tag */
248 #define JAZZ_R4030_CACHE_BMASK 0xE0000058 /* I/O Cache Byte Mask */
249 #define JAZZ_R4030_CACHE_BWIN 0xE0000060 /* I/O Cache Buffer Window */
250
251 /*
252 * Remote Speed Registers.
253 *
254 * 0: free, 1: Ethernet, 2: SCSI, 3: Floppy,
255 * 4: RTC, 5: Kb./Mouse 6: serial 1, 7: serial 2,
256 * 8: parallel, 9: NVRAM, 10: CPU, 11: PROM,
257 * 12: reserved, 13: free, 14: 7seg LED, 15: ???
258 */
259 #define JAZZ_R4030_REM_SPEED 0xE0000070 /* 16 Remote Speed Registers */
260 /* 0xE0000070,78,80... 0xE00000E8 */
261 #define JAZZ_R4030_IRQ_ENABLE 0xE00000E8 /* Internal Interrupt Enable */
262 #define JAZZ_R4030_INVAL_ADDR 0xE0000010 /* Invalid address Register */
263 #define JAZZ_R4030_IRQ_SOURCE 0xE0000200 /* Interrupt Source Register */
264 #define JAZZ_R4030_I386_ERROR 0xE0000208 /* i386/EISA Bus Error */
265
266 /*
267 * Virtual (E)ISA controller address
268 */
269 #define JAZZ_EISA_IRQ_ACK 0xE0000238 /* EISA interrupt acknowledge */
270
271 /*
272 * Access the R4030 DMA and I/O Controller
273 */
274 #ifndef _LANGUAGE_ASSEMBLY
275
276 extern inline void r4030_delay(void)
277 {
278 __asm__ __volatile__(
279 ".set\tnoreorder\n\t"
280 "nop\n\t"
281 "nop\n\t"
282 "nop\n\t"
283 "nop\n\t"
284 ".set\treorder");
285 }
286
287 extern inline unsigned short r4030_read_reg16(unsigned addr)
288 {
289 unsigned short ret = *((volatile unsigned short *)addr);
290 r4030_delay();
291 return ret;
292 }
293
294 extern inline unsigned int r4030_read_reg32(unsigned addr)
295 {
296 unsigned int ret = *((volatile unsigned int *)addr);
297 r4030_delay();
298 return ret;
299 }
300
301 extern inline void r4030_write_reg16(unsigned addr, unsigned val)
302 {
303 *((volatile unsigned short *)addr) = val;
304 r4030_delay();
305 }
306
307 extern inline void r4030_write_reg32(unsigned addr, unsigned val)
308 {
309 *((volatile unsigned int *)addr) = val;
310 r4030_delay();
311 }
312
313 #endif /* !LANGUAGE_ASSEMBLY__ */
314
315 #define JAZZ_FDC_BASE 0xe0003000
316 #define JAZZ_RTC_BASE 0xe0004000
317 #define JAZZ_PORT_BASE 0xe2000000
318
319 #define JAZZ_EISA_BASE 0xe3000000
320
321 #endif /* __ASM_MIPS_JAZZ_H */
322