File: /usr/src/linux/arch/mips64/kernel/setup.c
1 /*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * Copyright (C) 1995 Linus Torvalds
7 * Copyright (C) 1994, 1995, 1996, 1997, 1998, 1999 Ralf Baechle
8 * Copyright (C) 1996 Stoned Elipot
9 * Copyright (C) 1999 Silicon Graphics, Inc.
10 */
11 #include <linux/config.h>
12 #include <linux/errno.h>
13 #include <linux/init.h>
14 #include <linux/sched.h>
15 #include <linux/kernel.h>
16 #include <linux/mm.h>
17 #include <linux/stddef.h>
18 #include <linux/string.h>
19 #include <linux/unistd.h>
20 #include <linux/ptrace.h>
21 #include <linux/slab.h>
22 #include <linux/user.h>
23 #include <linux/utsname.h>
24 #include <linux/a.out.h>
25 #include <linux/tty.h>
26 #ifdef CONFIG_BLK_DEV_RAM
27 #include <linux/blk.h>
28 #endif
29
30 #include <asm/asm.h>
31 #include <asm/bootinfo.h>
32 #include <asm/cachectl.h>
33 #include <asm/cpu.h>
34 #include <asm/stackframe.h>
35 #include <asm/system.h>
36 #include <asm/pgalloc.h>
37
38 #ifndef CONFIG_SMP
39 struct cpuinfo_mips cpu_data[1];
40 #endif
41
42 #ifdef CONFIG_VT
43 struct screen_info screen_info;
44 #endif
45
46 /*
47 * Not all of the MIPS CPUs have the "wait" instruction available. This
48 * is set to true if it is available. The wait instruction stops the
49 * pipeline and reduces the power consumption of the CPU very much.
50 */
51 char wait_available;
52
53 /*
54 * Do we have a cyclecounter available?
55 */
56 char cyclecounter_available;
57
58 /*
59 * Set if box has EISA slots.
60 */
61 int EISA_bus = 0;
62
63 #ifdef CONFIG_BLK_DEV_FD
64 extern struct fd_ops no_fd_ops;
65 struct fd_ops *fd_ops;
66 #endif
67
68 #ifdef CONFIG_BLK_DEV_IDE
69 extern struct ide_ops no_ide_ops;
70 struct ide_ops *ide_ops;
71 #endif
72
73 extern struct rtc_ops no_rtc_ops;
74 struct rtc_ops *rtc_ops;
75
76 extern struct kbd_ops no_kbd_ops;
77 struct kbd_ops *kbd_ops;
78
79 /*
80 * Setup information
81 *
82 * These are initialized so they are in the .data section
83 */
84 unsigned long mips_cputype = CPU_UNKNOWN;
85 unsigned long mips_machtype = MACH_UNKNOWN;
86 unsigned long mips_machgroup = MACH_GROUP_UNKNOWN;
87
88 struct boot_mem_map boot_mem_map;
89
90 unsigned char aux_device_present;
91
92 extern void load_mmu(void);
93
94 static char command_line[CL_SIZE] = { 0, };
95 char saved_command_line[CL_SIZE];
96 extern char arcs_cmdline[CL_SIZE];
97
98 extern void ip22_setup(void);
99 extern void ip27_setup(void);
100
101 static inline void cpu_probe(void)
102 {
103 unsigned int prid = read_32bit_cp0_register(CP0_PRID);
104
105 switch(prid & 0xff00) {
106 case PRID_IMP_R4000:
107 if((prid & 0xff) == PRID_REV_R4400)
108 mips_cputype = CPU_R4400SC;
109 else
110 mips_cputype = CPU_R4000SC;
111 break;
112 case PRID_IMP_R4600:
113 mips_cputype = CPU_R4600;
114 break;
115 case PRID_IMP_R4700:
116 mips_cputype = CPU_R4700;
117 break;
118 case PRID_IMP_R5000:
119 mips_cputype = CPU_R5000;
120 break;
121 case PRID_IMP_NEVADA:
122 mips_cputype = CPU_NEVADA;
123 break;
124 case PRID_IMP_R8000:
125 mips_cputype = CPU_R8000;
126 break;
127 case PRID_IMP_R10000:
128 case PRID_IMP_R12000:
129 mips_cputype = CPU_R10000;
130 break;
131 default:
132 mips_cputype = CPU_UNKNOWN;
133 }
134 }
135
136 void __init setup_arch(char **cmdline_p)
137 {
138 cpu_probe();
139 load_mmu();
140
141 #ifdef CONFIG_SGI_IP22
142 ip22_setup();
143 #endif
144 #ifdef CONFIG_SGI_IP27
145 ip27_setup();
146 #endif
147
148 #ifdef CONFIG_ARC_MEMORY
149 bootmem_init ();
150 #endif
151
152 strncpy(command_line, arcs_cmdline, CL_SIZE);
153 memcpy(saved_command_line, command_line, CL_SIZE);
154 saved_command_line[CL_SIZE-1] = '\0';
155
156 *cmdline_p = command_line;
157
158 paging_init();
159 }
160