File: /usr/src/linux/include/asm-parisc/pdcpat.h

1     #ifndef __PARISC_PATPDC_H
2     #define __PARISC_PATPDC_H
3     
4     /*
5      * This file is subject to the terms and conditions of the GNU General Public
6      * License.  See the file "COPYING" in the main directory of this archive
7      * for more details.
8      *
9      * Copyright (c) Hewlett Packard (Paul Bame <bame@puffin.external.hp.com>)
10      * Copyright 2000 (c) Grant Grundler <grundler@puffin.external.hp.com>
11      */
12     
13     
14     /* PDC PAT CELL */
15     #define PDC_PAT_CELL           	64L   /* Interface for gaining and 
16                                              * manipulatin g cell state within PD */
17     #define PDC_PAT_CELL_GET_NUMBER    0L   /* Return Cell number */
18     #define PDC_PAT_CELL_GET_INFO      1L   /* Returns info about Cell */
19     #define PDC_PAT_CELL_MODULE        2L   /* Returns info about Module */
20     #define PDC_PAT_CELL_SET_ATTENTION 9L   /* Set Cell Attention indicator */
21     #define PDC_PAT_CELL_NUMBER_TO_LOC 10L   /* Cell Number -> Location */
22     #define PDC_PAT_CELL_WALK_FABRIC   11L   /* Walk the Fabric */
23     #define PDC_PAT_CELL_GET_RDT_SIZE  12L   /* Return Route Distance Table Sizes */
24     #define PDC_PAT_CELL_GET_RDT       13L   /* Return Route Distance Tables */
25     #define PDC_PAT_CELL_GET_LOCAL_PDH_SZ 14L /* Read Local PDH Buffer Size */
26     #define PDC_PAT_CELL_SET_LOCAL_PDH    15L  /* Write Local PDH Buffer */
27     #define PDC_PAT_CELL_GET_REMOTE_PDH_SZ 16L /* Return Remote PDH Buffer Size */
28     #define PDC_PAT_CELL_GET_REMOTE_PDH 17L /* Read Remote PDH Buffer */
29     #define PDC_PAT_CELL_GET_DBG_INFO   128L  /* Return DBG Buffer Info */
30     #define PDC_PAT_CELL_CHANGE_ALIAS   129L  /* Change Non-Equivalent Alias Chacking */
31     
32     
33     /*
34     ** Arg to PDC_PAT_CELL_MODULE memaddr[4]
35     **
36     ** Addresses on the Merced Bus != all Runway Bus addresses.
37     ** This is intended for programming SBA/LBA chips range registers.
38     */
39     #define IO_VIEW      0UL
40     #define PA_VIEW      1UL
41     
42     /* PDC_PAT_CELL_MODULE entity type values */
43     #define	PAT_ENTITY_CA	0	/* central agent */
44     #define	PAT_ENTITY_PROC	1	/* processor */
45     #define	PAT_ENTITY_MEM	2	/* memory controller */
46     #define	PAT_ENTITY_SBA	3	/* system bus adapter */
47     #define	PAT_ENTITY_LBA	4	/* local bus adapter */
48     #define	PAT_ENTITY_PBC	5	/* processor bus converter */
49     #define	PAT_ENTITY_XBC	6	/* crossbar fabric connect */
50     #define	PAT_ENTITY_RC	7	/* fabric interconnect */
51     
52     /* PDC_PAT_CELL_MODULE address range type values */
53     #define PAT_PBNUM           0         /* PCI Bus Number */
54     #define PAT_LMMIO           1         /* < 4G MMIO Space */
55     #define PAT_GMMIO           2         /* > 4G MMIO Space */
56     #define PAT_NPIOP           3         /* Non Postable I/O Port Space */
57     #define PAT_PIOP            4         /* Postable I/O Port Space */
58     #define PAT_AHPA            5         /* Addional HPA Space */
59     #define PAT_UFO             6         /* HPA Space (UFO for Mariposa) */
60     #define PAT_GNIP            7         /* GNI Reserved Space */
61     
62     
63     /* PDC PAT CHASSIS LOG */
64     
65     #define PDC_PAT_CHASSIS_LOG		65L /* Platform logging & forward
66     					    ** progress functions */
67     #define PDC_PAT_CHASSIS_WRITE_LOG    	0L /* Write Log Entry */
68     #define PDC_PAT_CHASSIS_READ_LOG     	1L /* Read  Log Entry */
69     
70     /* PDC PAT CPU  */
71     
72     #define PDC_PAT_CPU                	67L /* Interface to CPU configuration
73                                             	* within the protection domain */
74     #define PDC_PAT_CPU_INFO            	0L /* Return CPU config info */
75     #define PDC_PAT_CPU_DELETE          	1L /* Delete CPU */
76     #define PDC_PAT_CPU_ADD             	2L /* Add    CPU */
77     #define PDC_PAT_CPU_GET_NUMBER      	3L /* Return CPU Number */
78     #define PDC_PAT_CPU_GET_HPA         	4L /* Return CPU HPA */
79     #define PDC_PAT_CPU_STOP            	5L /* Stop   CPU */
80     #define PDC_PAT_CPU_RENDEZVOUS      	6L /* Rendezvous CPU */
81     #define PDC_PAT_CPU_GET_CLOCK_INFO  	7L /* Return CPU Clock info */
82     #define PDC_PAT_CPU_GET_RENDEZVOUS_STATE 8L /* Return Rendezvous State */
83     #define PDC_PAT_CPU_PLUNGE_FABRIC 	128L /* Plunge Fabric */
84     #define PDC_PAT_CPU_UPDATE_CACHE_CLEANSING 129L /* Manipulate Cache 
85                                                      * Cleansing Mode */
86     /*  PDC PAT EVENT */
87     
88     #define PDC_PAT_EVENT              	68L /* Interface to Platform Events */
89     #define PDC_PAT_EVENT_GET_CAPS     	0L /* Get Capabilities */
90     #define PDC_PAT_EVENT_SET_MODE     	1L /* Set Notification Mode */
91     #define PDC_PAT_EVENT_SCAN         	2L /* Scan Event */
92     #define PDC_PAT_EVENT_HANDLE       	3L /* Handle Event */
93     #define PDC_PAT_EVENT_GET_NB_CALL  	4L /* Get Non-Blocking call Args */
94     
95     /*  PDC PAT HPMC */
96     
97     #define PDC_PAT_HPMC               70L /* Cause processor to go into spin
98     				       ** loop, and wait for wake up from
99     				       ** Monarch Processor */
100     #define PDC_PAT_HPMC_RENDEZ_CPU     0L /* go into spin loop */
101     #define PDC_PAT_HPMC_SET_PARAMS     1L /* Allows OS to specify intr which PDC 
102                                             * will use to interupt OS during machine
103                                             * check rendezvous */
104     
105     /* parameters for PDC_PAT_HPMC_SET_PARAMS: */
106     #define HPMC_SET_PARAMS_INTR 	    1L /* Rendezvous Interrupt */
107     #define HPMC_SET_PARAMS_WAKE 	    2L /* Wake up processor */
108     
109     /*  PDC PAT IO */
110     
111     #define PDC_PAT_IO                  71L /* On-line services for I/O modules */
112     #define PDC_PAT_IO_GET_SLOT_STATUS   	5L /* Get Slot Status Info*/
113     #define PDC_PAT_IO_GET_LOC_FROM_HARDWARE 6L /* Get Physical Location from */
114                                                 /* Hardware Path */
115     #define PDC_PAT_IO_GET_HARDWARE_FROM_LOC 7L /* Get Hardware Path from 
116                                                  * Physical Location */
117     #define PDC_PAT_IO_GET_PCI_CONFIG_FROM_HW 11L /* Get PCI Configuration
118                                                    * Address from Hardware Path */
119     #define PDC_PAT_IO_GET_HW_FROM_PCI_CONFIG 12L /* Get Hardware Path 
120                                                    * from PCI Configuration Address */
121     #define PDC_PAT_IO_READ_HOST_BRIDGE_INFO 13L  /* Read Host Bridge State Info */
122     #define PDC_PAT_IO_CLEAR_HOST_BRIDGE_INFO 14L /* Clear Host Bridge State Info*/
123     #define PDC_PAT_IO_GET_PCI_ROUTING_TABLE_SIZE 15L /* Get PCI INT Routing Table 
124                                                        * Size */
125     #define PDC_PAT_IO_GET_PCI_ROUTING_TABLE  16L /* Get PCI INT Routing Table */
126     #define PDC_PAT_IO_GET_HINT_TABLE_SIZE 	17L /* Get Hint Table Size */
127     #define PDC_PAT_IO_GET_HINT_TABLE   	18L /* Get Hint Table */
128     #define PDC_PAT_IO_PCI_CONFIG_READ  	19L /* PCI Config Read */
129     #define PDC_PAT_IO_PCI_CONFIG_WRITE 	20L /* PCI Config Write */
130     #define PDC_PAT_IO_GET_NUM_IO_SLOTS 	21L /* Get Number of I/O Bay Slots in 
131                                            		  * Cabinet */
132     #define PDC_PAT_IO_GET_LOC_IO_SLOTS 	22L /* Get Physical Location of I/O */
133                                        		     /* Bay Slots in Cabinet */
134     #define PDC_PAT_IO_BAY_STATUS_INFO  	28L /* Get I/O Bay Slot Status Info */
135     #define PDC_PAT_IO_GET_PROC_VIEW        29L /* Get Processor view of IO address */
136     #define PDC_PAT_IO_PROG_SBA_DIR_RANGE   30L /* Program directed range */
137     
138     /* PDC PAT MEM */
139     
140     #define PDC_PAT_MEM             	72L /* Manage memory page deallocation */
141     #define PDC_PAT_MEM_PD_INFO     	0L /* Return PDT info for PD       */
142     #define PDC_PAT_MEM_PD_CLEAR    	1L /* Clear PDT for PD             */
143     #define PDC_PAT_MEM_PD_READ     	2L /* Read PDT entries for PD      */
144     #define PDC_PAT_MEM_PD_RESET    	3L /* Reset clear bit for PD       */
145     #define PDC_PAT_MEM_CELL_INFO   	5L /* Return PDT info For Cell     */
146     #define PDC_PAT_MEM_CELL_CLEAR  	6L /* Clear PDT For Cell           */
147     #define PDC_PAT_MEM_CELL_READ   	7L /* Read PDT entries For Cell    */
148     #define PDC_PAT_MEM_CELL_RESET  	8L /* Reset clear bit For Cell     */
149     #define PDC_PAT_MEM_SETGM	  	9L /* Set Golden Memory value      */
150     #define PDC_PAT_MEM_ADD_PAGE    	10L /* ADDs a page to the cell      */
151     #define PDC_PAT_MEM_ADDRESS     	11L /* Get Physical Location From   */
152                                         		 /* Memory Address               */
153     #define PDC_PAT_MEM_GET_TXT_SIZE   	12L /* Get Formatted Text Size   */
154     #define PDC_PAT_MEM_GET_PD_TXT     	13L /* Get PD Formatted Text     */
155     #define PDC_PAT_MEM_GET_CELL_TXT   	14L /* Get Cell Formatted Text   */
156     #define PDC_PAT_MEM_RD_STATE_INFO  	15L /* Read Mem Module State Info*/
157     #define PDC_PAT_MEM_CLR_STATE_INFO 	16L /*Clear Mem Module State Info*/
158     #define PDC_PAT_MEM_CLEAN_RANGE    	128L /*Clean Mem in specific range*/
159     #define PDC_PAT_MEM_GET_TBL_SIZE   	131L /* Get Memory Table Size     */
160     #define PDC_PAT_MEM_GET_TBL        	132L /* Get Memory Table          */
161     
162     /* PDC PAT NVOLATILE */
163     
164     #define PDC_PAT_NVOLATILE          	73L /* Access Non-Volatile Memory */
165     #define PDC_PAT_NVOLATILE_READ      	0L /* Read Non-Volatile Memory   */
166     #define PDC_PAT_NVOLATILE_WRITE     	1L /* Write Non-Volatile Memory  */
167     #define PDC_PAT_NVOLATILE_GET_SIZE  	2L /* Return size of NVM         */
168     #define PDC_PAT_NVOLATILE_VERIFY    	3L /* Verify contents of NVM     */
169     #define PDC_PAT_NVOLATILE_INIT      	4L /* Initialize NVM             */
170     
171     #ifndef __ASSEMBLY__
172     #include <linux/types.h>
173     
174     /*
175     ** PDC_PAT_CELL_GET_INFO return block
176     */
177     typedef struct pdc_pat_cell_info_rtn_block {
178     	unsigned long cpu_info;
179     	unsigned long cell_info;
180     	unsigned long cell_location;
181     	unsigned long reo_location;
182     	unsigned long mem_size;
183     	unsigned long dimm_status;
184     	unsigned long pdc_rev;
185     	unsigned long fabric_info0;
186     	unsigned long fabric_info1;
187     	unsigned long fabric_info2;
188     	unsigned long fabric_info3;
189     	unsigned long reserved[21];
190     } pdc_pat_cell_info_rtn_block_t;
191     
192     
193     /* FIXME: mod[508] should really be a union of the various mod components */
194     struct pdc_pat_cell_mod_maddr_block {	/* PDC_PAT_CELL_MODULE */
195     	unsigned long cba;              /* function 0 configuration space address */
196     	unsigned long mod_info;         /* module information */
197     	unsigned long mod_location;     /* physical location of the module */
198     	unsigned long mod_path;         /* module path (device path - layers) */
199     	unsigned long mod[508];		/* PAT cell module components */
200     } __attribute__((aligned(8))) ;
201     
202     typedef struct pdc_pat_cell_mod_maddr_block pdc_pat_cell_mod_maddr_block_t;
203     
204     
205     extern int pdc_pat_cell_get_number(void *);
206     extern int pdc_pat_cell_module(void *, unsigned long, unsigned long, unsigned long, void *);
207     extern int pdc_pat_cell_num_to_loc(void *, unsigned long);
208     
209     /* Flag to indicate this is a PAT box...don't use this unless you
210     ** really have to...it might go away some day.
211     */
212     #ifdef __LP64__
213     extern int pdc_pat;     /* arch/parisc/kernel/inventory.c */
214     #endif
215     
216     /********************************************************************
217     * PDC_PAT_CELL[Return Cell Module] memaddr[0] conf_base_addr
218     * ----------------------------------------------------------
219     * Bit  0 to 51 - conf_base_addr
220     * Bit 52 to 62 - reserved
221     * Bit       63 - endianess bit
222     ********************************************************************/
223     #define PAT_GET_CBA(value) ((value) & 0xfffffffffffff000UL)
224     
225     /********************************************************************
226     * PDC_PAT_CELL[Return Cell Module] memaddr[1] mod_info
227     * ----------------------------------------------------
228     * Bit  0 to  7 - entity type
229     *    0 = central agent,            1 = processor,
230     *    2 = memory controller,        3 = system bus adapter,
231     *    4 = local bus adapter,        5 = processor bus converter,
232     *    6 = crossbar fabric connect,  7 = fabric interconnect,
233     *    8 to 254 reserved,            255 = unknown.
234     * Bit  8 to 15 - DVI
235     * Bit 16 to 23 - IOC functions
236     * Bit 24 to 39 - reserved
237     * Bit 40 to 63 - mod_pages
238     *    number of 4K pages a module occupies starting at conf_base_addr
239     ********************************************************************/
240     #define PAT_GET_ENTITY(value)	(((value) >> 56) & 0xffUL)
241     #define PAT_GET_DVI(value)	(((value) >> 48) & 0xffUL)
242     #define PAT_GET_IOC(value)	(((value) >> 40) & 0xffUL)
243     #define PAT_GET_MOD_PAGES(value)(((value) & 0xffffffUL)
244     
245     #endif /* __ASSEMBLY__ */
246     
247     #endif /* ! __PARISC_PATPDC_H */
248